From: Luke Kenneth Casson Leighton Date: Sun, 14 Oct 2018 05:20:05 +0000 (+0100) Subject: add rv_eq and rv_ne X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=ae3bd3d5c4dfdbbb927dbd5af41400dc52cda27e;p=riscv-isa-sim.git add rv_eq and rv_ne --- diff --git a/riscv/sv_insn_redirect.cc b/riscv/sv_insn_redirect.cc index a986cef..012ff0d 100644 --- a/riscv/sv_insn_redirect.cc +++ b/riscv/sv_insn_redirect.cc @@ -297,3 +297,13 @@ sreg_t sv_proc_t::rv_gt(sreg_t lhs, sreg_t rhs) return lhs > rhs; } +reg_t sv_proc_t::rv_eq(reg_t lhs, reg_t rhs) +{ + return lhs == rhs; +} + +reg_t sv_proc_t::rv_ne(reg_t lhs, reg_t rhs) +{ + return lhs != rhs; +} + diff --git a/riscv/sv_insn_redirect.h b/riscv/sv_insn_redirect.h index aba4f0c..d7e44ea 100644 --- a/riscv/sv_insn_redirect.h +++ b/riscv/sv_insn_redirect.h @@ -110,6 +110,8 @@ public: sreg_t rv_lt(sreg_t lhs, sreg_t rhs); reg_t rv_gt(reg_t lhs, reg_t rhs); sreg_t rv_gt(sreg_t lhs, sreg_t rhs); + reg_t rv_eq(reg_t lhs, reg_t rhs); + reg_t rv_ne(reg_t lhs, reg_t rhs); #include "sv_insn_decl.h" };