From: Ben Skeggs <skeggsb@gmail.com>
Date: Sun, 10 Feb 2008 04:16:50 +0000 (+1100)
Subject: nv40: prep for multiple pipe contexts on a single hw channel
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=ae78e6b549c8c67c0997f79bf1fdfac7929df92a;p=mesa.git

nv40: prep for multiple pipe contexts on a single hw channel
---

diff --git a/src/mesa/pipe/nv40/nv40_context.c b/src/mesa/pipe/nv40/nv40_context.c
index 49c67a8fd54..302ad04c154 100644
--- a/src/mesa/pipe/nv40/nv40_context.c
+++ b/src/mesa/pipe/nv40/nv40_context.c
@@ -5,6 +5,10 @@
 
 #include "nv40_context.h"
 
+#define NV4X_GRCLASS4097_CHIPSETS 0x00000baf
+#define NV4X_GRCLASS4497_CHIPSETS 0x00005450
+#define NV6X_GRCLASS4497_CHIPSETS 0x00000088
+
 static const char *
 nv40_get_name(struct pipe_context *pipe)
 {
@@ -93,7 +97,7 @@ nv40_flush(struct pipe_context *pipe, unsigned flags)
 	}
 
 	if (flags & PIPE_FLUSH_WAIT) {
-		nvws->notifier_reset(nv40->sync, 0);
+		nvws->notifier_reset(nv40->hw->sync, 0);
 		BEGIN_RING(curie, 0x104, 1);
 		OUT_RING  (0);
 		BEGIN_RING(curie, 0x100, 1);
@@ -103,104 +107,32 @@ nv40_flush(struct pipe_context *pipe, unsigned flags)
 	FIRE_RING();
 
 	if (flags & PIPE_FLUSH_WAIT)
-		nvws->notifier_wait(nv40->sync, 0, 0, 2000);
+		nvws->notifier_wait(nv40->hw->sync, 0, 0, 2000);
 }
 
 static void
-nv40_destroy(struct pipe_context *pipe)
+nv40_channel_takedown(struct nv40_channel_context *cnv40)
 {
-	struct nv40_context *nv40 = nv40_context(pipe);
-	struct nouveau_winsys *nvws = nv40->nvws;
-
-	if (nv40->draw)
-		draw_destroy(nv40->draw);
-
-	nvws->res_free(&nv40->vertprog.exec_heap);
-	nvws->res_free(&nv40->vertprog.data_heap);
-
-	nvws->res_free(&nv40->query_heap);
-	nvws->notifier_free(&nv40->query);
-
-	nvws->notifier_free(&nv40->sync);
-
-	nvws->grobj_free(&nv40->curie);
-
-	free(nv40);
+	struct nouveau_winsys *nvws = cnv40->nvws;
+
+	nvws->res_free(&cnv40->vp_exec_heap);
+	nvws->res_free(&cnv40->vp_data_heap);
+	nvws->res_free(&cnv40->query_heap);
+	nvws->notifier_free(&cnv40->query);
+	nvws->notifier_free(&cnv40->sync);
+	nvws->grobj_free(&cnv40->curie);
+	free(cnv40);
 }
 
-static boolean
-nv40_init_hwctx(struct nv40_context *nv40, int curie_class)
+static struct nv40_channel_context *
+nv40_channel_init(struct pipe_winsys *ws, struct nouveau_winsys *nvws,
+		  unsigned chipset)
 {
-	struct nouveau_winsys *nvws = nv40->nvws;
+	struct nv40_channel_context *cnv40 = NULL;
+	struct nouveau_stateobj *so;
+	unsigned curie_class = 0;
 	int ret;
 
-	ret = nvws->grobj_alloc(nvws, curie_class, &nv40->curie);
-	if (ret) {
-		NOUVEAU_ERR("Error creating 3D object: %d\n", ret);
-		return FALSE;
-	}
-
-	BEGIN_RING(curie, NV40TCL_DMA_NOTIFY, 1);
-	OUT_RING  (nv40->sync->handle);
-	BEGIN_RING(curie, NV40TCL_DMA_TEXTURE0, 2);
-	OUT_RING  (nvws->channel->vram->handle);
-	OUT_RING  (nvws->channel->gart->handle);
-	BEGIN_RING(curie, NV40TCL_DMA_COLOR1, 1);
-	OUT_RING  (nvws->channel->vram->handle);
-	BEGIN_RING(curie, NV40TCL_DMA_COLOR0, 2);
-	OUT_RING  (nvws->channel->vram->handle);
-	OUT_RING  (nvws->channel->vram->handle);
-	BEGIN_RING(curie, NV40TCL_DMA_VTXBUF0, 2);
-	OUT_RING  (nvws->channel->vram->handle);
-	OUT_RING  (nvws->channel->gart->handle);
-	BEGIN_RING(curie, NV40TCL_DMA_FENCE, 2);
-	OUT_RING  (0);
-	OUT_RING  (nv40->query->handle);
-	BEGIN_RING(curie, NV40TCL_DMA_UNK01AC, 2);
-	OUT_RING  (nvws->channel->vram->handle);
-	OUT_RING  (nvws->channel->vram->handle);
-	BEGIN_RING(curie, NV40TCL_DMA_COLOR2, 2);
-	OUT_RING  (nvws->channel->vram->handle);
-	OUT_RING  (nvws->channel->vram->handle);
-
-	BEGIN_RING(curie, 0x1ea4, 3);
-	OUT_RING  (0x00000010);
-	OUT_RING  (0x01000100);
-	OUT_RING  (0xff800006);
-
-	/* vtxprog output routing */
-	BEGIN_RING(curie, 0x1fc4, 1);
-	OUT_RING  (0x06144321);
-	BEGIN_RING(curie, 0x1fc8, 2);
-	OUT_RING  (0xedcba987);
-	OUT_RING  (0x00000021);
-	BEGIN_RING(curie, 0x1fd0, 1);
-	OUT_RING  (0x00171615);
-	BEGIN_RING(curie, 0x1fd4, 1);
-	OUT_RING  (0x001b1a19);
-
-	BEGIN_RING(curie, 0x1ef8, 1);
-	OUT_RING  (0x0020ffff);
-	BEGIN_RING(curie, 0x1d64, 1);
-	OUT_RING  (0x00d30000);
-	BEGIN_RING(curie, 0x1e94, 1);
-	OUT_RING  (0x00000001);
-
-	FIRE_RING ();
-	return TRUE;
-}
-
-#define NV4X_GRCLASS4097_CHIPSETS 0x00000baf
-#define NV4X_GRCLASS4497_CHIPSETS 0x00005450
-#define NV6X_GRCLASS4497_CHIPSETS 0x00000088
-
-struct pipe_context *
-nv40_create(struct pipe_winsys *pipe_winsys, struct nouveau_winsys *nvws,
-	    unsigned chipset)
-{
-	struct nv40_context *nv40;
-	int curie_class = 0, ret;
-
 	switch (chipset & 0xf0) {
 	case 0x40:
 		if (NV4X_GRCLASS4097_CHIPSETS & (1 << (chipset & 0x0f)))
@@ -218,65 +150,152 @@ nv40_create(struct pipe_winsys *pipe_winsys, struct nouveau_winsys *nvws,
 	}
 
 	if (!curie_class) {
-		NOUVEAU_ERR("Unknown NV4x chipset: NV%02x\n", chipset);
+		NOUVEAU_ERR("Unknown nv4x chipset: nv%02x\n", chipset);
 		return NULL;
 	}
 
-	nv40 = CALLOC_STRUCT(nv40_context);
-	if (!nv40)
+	cnv40 = calloc(1, sizeof(struct nv40_channel_context));
+	if (!cnv40)
 		return NULL;
-	nv40->chipset = chipset;
-	nv40->nvws = nvws;
+	cnv40->chipset = chipset;
+	cnv40->nvws = nvws;
 
 	/* Notifier for sync purposes */
-	ret = nvws->notifier_alloc(nvws, 1, &nv40->sync);
+	ret = nvws->notifier_alloc(nvws, 1, &cnv40->sync);
 	if (ret) {
 		NOUVEAU_ERR("Error creating notifier object: %d\n", ret);
-		nv40_destroy(&nv40->pipe);
+		nv40_channel_takedown(cnv40);
 		return NULL;
 	}
 
 	/* Query objects */
-	ret = nvws->notifier_alloc(nvws, 32, &nv40->query);
+	ret = nvws->notifier_alloc(nvws, 32, &cnv40->query);
 	if (ret) {
 		NOUVEAU_ERR("Error initialising query objects: %d\n", ret);
-		nv40_destroy(&nv40->pipe);
+		nv40_channel_takedown(cnv40);
 		return NULL;
 	}
 
-	ret = nvws->res_init(&nv40->query_heap, 0, 32);
+	ret = nvws->res_init(&cnv40->query_heap, 0, 32);
 	if (ret) {
 		NOUVEAU_ERR("Error initialising query object heap: %d\n", ret);
-		nv40_destroy(&nv40->pipe);
+		nv40_channel_takedown(cnv40);
 		return NULL;
 	}
 
 	/* Vtxprog resources */
-	if (nvws->res_init(&nv40->vertprog.exec_heap, 0, 512) ||
-	    nvws->res_init(&nv40->vertprog.data_heap, 0, 256)) {
-		nv40_destroy(&nv40->pipe);
+	if (nvws->res_init(&cnv40->vp_exec_heap, 0, 512) ||
+	    nvws->res_init(&cnv40->vp_data_heap, 0, 256)) {
+		nv40_channel_takedown(cnv40);
 		return NULL;
 	}
 
+	/* 3D object */
+	ret = nvws->grobj_alloc(nvws, curie_class, &cnv40->curie);
+	if (ret) {
+		NOUVEAU_ERR("Error creating 3D object: %d\n", ret);
+		return FALSE;
+	}
+
 	/* Static curie initialisation */
-	if (!nv40_init_hwctx(nv40, curie_class)) {
+	so = so_new(128, 0);
+	so_method(so, cnv40->curie, NV40TCL_DMA_NOTIFY, 1);
+	so_data  (so, cnv40->sync->handle);
+	so_method(so, cnv40->curie, NV40TCL_DMA_TEXTURE0, 2);
+	so_data  (so, nvws->channel->vram->handle);
+	so_data  (so, nvws->channel->gart->handle);
+	so_method(so, cnv40->curie, NV40TCL_DMA_COLOR1, 1);
+	so_data  (so, nvws->channel->vram->handle);
+	so_method(so, cnv40->curie, NV40TCL_DMA_COLOR0, 2);
+	so_data  (so, nvws->channel->vram->handle);
+	so_data  (so, nvws->channel->vram->handle);
+	so_method(so, cnv40->curie, NV40TCL_DMA_VTXBUF0, 2);
+	so_data  (so, nvws->channel->vram->handle);
+	so_data  (so, nvws->channel->gart->handle);
+	so_method(so, cnv40->curie, NV40TCL_DMA_FENCE, 2);
+	so_data  (so, 0);
+	so_data  (so, cnv40->query->handle);
+	so_method(so, cnv40->curie, NV40TCL_DMA_UNK01AC, 2);
+	so_data  (so, nvws->channel->vram->handle);
+	so_data  (so, nvws->channel->vram->handle);
+	so_method(so, cnv40->curie, NV40TCL_DMA_COLOR2, 2);
+	so_data  (so, nvws->channel->vram->handle);
+	so_data  (so, nvws->channel->vram->handle);
+
+	so_method(so, cnv40->curie, 0x1ea4, 3);
+	so_data  (so, 0x00000010);
+	so_data  (so, 0x01000100);
+	so_data  (so, 0xff800006);
+
+	/* vtxprog output routing */
+	so_method(so, cnv40->curie, 0x1fc4, 1);
+	so_data  (so, 0x06144321);
+	so_method(so, cnv40->curie, 0x1fc8, 2);
+	so_data  (so, 0xedcba987);
+	so_data  (so, 0x00000021);
+	so_method(so, cnv40->curie, 0x1fd0, 1);
+	so_data  (so, 0x00171615);
+	so_method(so, cnv40->curie, 0x1fd4, 1);
+	so_data  (so, 0x001b1a19);
+
+	so_method(so, cnv40->curie, 0x1ef8, 1);
+	so_data  (so, 0x0020ffff);
+	so_method(so, cnv40->curie, 0x1d64, 1);
+	so_data  (so, 0x00d30000);
+	so_method(so, cnv40->curie, 0x1e94, 1);
+	so_data  (so, 0x00000001);
+
+	so_emit(nvws, so);
+	so_ref(NULL, &so);
+	nvws->push_flush(nvws->channel, 0);
+
+	return cnv40;
+}
+
+static void
+nv40_destroy(struct pipe_context *pipe)
+{
+	struct nv40_context *nv40 = nv40_context(pipe);
+
+	if (nv40->draw)
+		draw_destroy(nv40->draw);
+
+	if (nv40->hw) {
+		if (--nv40->hw->refcount == 0)
+			nv40_channel_takedown(nv40->hw);
+	}
+
+	free(nv40);
+}
+
+struct pipe_context *
+nv40_create(struct pipe_winsys *ws, struct nouveau_winsys *nvws,
+	    unsigned chipset)
+{
+	struct nv40_context *nv40;
+
+	nv40 = calloc(1, sizeof(struct nv40_context));
+	if (!nv40)
+		return NULL;
+
+	nv40->hw = nv40_channel_init(ws, nvws, chipset);
+	if (!nv40->hw) {
 		nv40_destroy(&nv40->pipe);
 		return NULL;
 	}
 
-	/* Pipe context setup */
-	nv40->pipe.winsys = pipe_winsys;
+	nv40->chipset = chipset;
+	nv40->nvws = nvws;
 
+	nv40->pipe.winsys = ws;
 	nv40->pipe.destroy = nv40_destroy;
 	nv40->pipe.get_name = nv40_get_name;
 	nv40->pipe.get_vendor = nv40_get_vendor;
 	nv40->pipe.get_param = nv40_get_param;
 	nv40->pipe.get_paramf = nv40_get_paramf;
-
 	nv40->pipe.draw_arrays = nv40_draw_arrays;
 	nv40->pipe.draw_elements = nv40_draw_elements;
 	nv40->pipe.clear = nv40_clear;
-
 	nv40->pipe.flush = nv40_flush;
 
 	nv40_init_query_functions(nv40);
diff --git a/src/mesa/pipe/nv40/nv40_context.h b/src/mesa/pipe/nv40/nv40_context.h
index 4aa34847e85..d7c9ee7851e 100644
--- a/src/mesa/pipe/nv40/nv40_context.h
+++ b/src/mesa/pipe/nv40/nv40_context.h
@@ -11,7 +11,7 @@
 #include "pipe/nouveau/nouveau_gldefs.h"
 
 #define NOUVEAU_PUSH_CONTEXT(ctx)                                              \
-	struct nv40_context *ctx = nv40
+	struct nv40_channel_context *ctx = nv40->hw
 #include "pipe/nouveau/nouveau_push.h"
 #include "pipe/nouveau/nouveau_stateobj.h"
 
@@ -35,20 +35,34 @@
 #define NV40_NEW_FRAGPROG	(1 << 10)
 #define NV40_NEW_ARRAYS		(1 << 11)
 
-struct nv40_context {
-	struct pipe_context pipe;
+struct nv40_channel_context {
 	struct nouveau_winsys *nvws;
+	unsigned refcount;
 
-	struct draw_context *draw;
+	unsigned chipset;
 
-	int chipset;
+	/* HW graphics objects */
 	struct nouveau_grobj *curie;
 	struct nouveau_notifier *sync;
 
-	/* query objects */
+	/* Query object resources */
 	struct nouveau_notifier *query;
 	struct nouveau_resource *query_heap;
 
+	/* Vtxprog resources */
+	struct nouveau_resource *vp_exec_heap;
+	struct nouveau_resource *vp_data_heap;
+};
+
+struct nv40_context {
+	struct pipe_context pipe;
+	struct nouveau_winsys *nvws;
+
+	struct nv40_channel_context *hw;
+	struct draw_context *draw;
+
+	int chipset;
+
 	uint32_t dirty;
 
 	struct nv40_sampler_state *tex_sampler[PIPE_MAX_SAMPLERS];
@@ -69,9 +83,6 @@ struct nv40_context {
 	struct nouveau_stateobj *so_stipple;
 
 	struct {
-		struct nouveau_resource *exec_heap;
-		struct nouveau_resource *data_heap;
-
 		struct nv40_vertex_program *active;
 
 		struct nv40_vertex_program *current;
diff --git a/src/mesa/pipe/nv40/nv40_fragprog.c b/src/mesa/pipe/nv40/nv40_fragprog.c
index 1165661010d..cb7b4a5e70d 100644
--- a/src/mesa/pipe/nv40/nv40_fragprog.c
+++ b/src/mesa/pipe/nv40/nv40_fragprog.c
@@ -817,11 +817,11 @@ nv40_fragprog_bind(struct nv40_context *nv40, struct nv40_fragment_program *fp)
 	}
 
 	so = so_new(4, 1);
-	so_method(so, nv40->curie, NV40TCL_FP_ADDRESS, 1);
+	so_method(so, nv40->hw->curie, NV40TCL_FP_ADDRESS, 1);
 	so_reloc (so, fp->buffer, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_GART |
 		  NOUVEAU_BO_RD | NOUVEAU_BO_LOW | NOUVEAU_BO_OR,
 		  NV40TCL_FP_ADDRESS_DMA0, NV40TCL_FP_ADDRESS_DMA1);
-	so_method(so, nv40->curie, NV40TCL_FP_CONTROL, 1);
+	so_method(so, nv40->hw->curie, NV40TCL_FP_CONTROL, 1);
 	so_data  (so, fp->fp_control);
 
 	so_emit(nv40->nvws, so);
diff --git a/src/mesa/pipe/nv40/nv40_fragtex.c b/src/mesa/pipe/nv40/nv40_fragtex.c
index c87e3618317..d278ce18975 100644
--- a/src/mesa/pipe/nv40/nv40_fragtex.c
+++ b/src/mesa/pipe/nv40/nv40_fragtex.c
@@ -104,7 +104,7 @@ nv40_fragtex_build(struct nv40_context *nv40, int unit)
 	txs = tf->swizzle;
 
 	so = so_new(16, 2);
-	so_method(so, nv40->curie, NV40TCL_TEX_OFFSET(unit), 8);
+	so_method(so, nv40->hw->curie, NV40TCL_TEX_OFFSET(unit), 8);
 	so_reloc (so, nv40mt->buffer, 0, tex_flags | NOUVEAU_BO_LOW, 0, 0);
 	so_reloc (so, nv40mt->buffer, txf, tex_flags | NOUVEAU_BO_OR,
 		  NV40TCL_TEX_FORMAT_DMA0, NV40TCL_TEX_FORMAT_DMA1);
@@ -116,7 +116,7 @@ nv40_fragtex_build(struct nv40_context *nv40, int unit)
 	so_data  (so, (pt->width[0] << NV40TCL_TEX_SIZE0_W_SHIFT) |
 		       pt->height[0]);
 	so_data  (so, ps->bcol);
-	so_method(so, nv40->curie, NV40TCL_TEX_SIZE1(unit), 1);
+	so_method(so, nv40->hw->curie, NV40TCL_TEX_SIZE1(unit), 1);
 	so_data  (so, (pt->depth[0] << NV40TCL_TEX_SIZE1_DEPTH_SHIFT) | txp);
 
 	so_emit(nv40->nvws, so);
diff --git a/src/mesa/pipe/nv40/nv40_query.c b/src/mesa/pipe/nv40/nv40_query.c
index 06f41fe84f7..eb305e64446 100644
--- a/src/mesa/pipe/nv40/nv40_query.c
+++ b/src/mesa/pipe/nv40/nv40_query.c
@@ -45,9 +45,9 @@ nv40_query_begin(struct pipe_context *pipe, struct pipe_query *pq)
 
 	assert(q->type == PIPE_QUERY_OCCLUSION_COUNTER);
 
-	if (nv40->nvws->res_alloc(nv40->query_heap, 1, NULL, &q->object))
+	if (nv40->nvws->res_alloc(nv40->hw->query_heap, 1, NULL, &q->object))
 		assert(0);
-	nv40->nvws->notifier_reset(nv40->query, q->object->start);
+	nv40->nvws->notifier_reset(nv40->hw->query, q->object->start);
 
 	BEGIN_RING(curie, NV40TCL_QUERY_RESET, 1);
 	OUT_RING  (1);
@@ -82,16 +82,17 @@ nv40_query_result(struct pipe_context *pipe, struct pipe_query *pq,
 	if (!q->ready) {
 		unsigned status;
 
-		status = nvws->notifier_status(nv40->query, q->object->start);
+		status = nvws->notifier_status(nv40->hw->query,
+					       q->object->start);
 		if (status != NV_NOTIFY_STATE_STATUS_COMPLETED) {
 			if (wait == FALSE)
 				return FALSE;
-			nvws->notifier_wait(nv40->query, q->object->start,
+			nvws->notifier_wait(nv40->hw->query, q->object->start,
 					    NV_NOTIFY_STATE_STATUS_COMPLETED,
 					    0);
 		}
 
-		q->result = nvws->notifier_retval(nv40->query,
+		q->result = nvws->notifier_retval(nv40->hw->query,
 						  q->object->start);
 		q->ready = TRUE;
 		nvws->res_free(&q->object);
diff --git a/src/mesa/pipe/nv40/nv40_state.c b/src/mesa/pipe/nv40/nv40_state.c
index ab53b03cb08..80e94737efb 100644
--- a/src/mesa/pipe/nv40/nv40_state.c
+++ b/src/mesa/pipe/nv40/nv40_state.c
@@ -10,39 +10,40 @@ nv40_blend_state_create(struct pipe_context *pipe,
 			const struct pipe_blend_state *cso)
 {
 	struct nv40_context *nv40 = nv40_context(pipe);
+	struct nouveau_grobj *curie = nv40->hw->curie;
 	struct nouveau_stateobj *so = so_new(16, 0);
 
 	if (cso->blend_enable) {
-		so_method(so, nv40->curie, NV40TCL_BLEND_ENABLE, 3);
+		so_method(so, curie, NV40TCL_BLEND_ENABLE, 3);
 		so_data  (so, 1);
 		so_data  (so, (nvgl_blend_func(cso->alpha_src_factor) << 16) |
 			       nvgl_blend_func(cso->rgb_src_factor));
 		so_data  (so, nvgl_blend_func(cso->alpha_dst_factor) << 16 |
 			      nvgl_blend_func(cso->rgb_dst_factor));
-		so_method(so, nv40->curie, NV40TCL_BLEND_EQUATION, 1);
+		so_method(so, curie, NV40TCL_BLEND_EQUATION, 1);
 		so_data  (so, nvgl_blend_eqn(cso->alpha_func) << 16 |
 			      nvgl_blend_eqn(cso->rgb_func));
 	} else {
-		so_method(so, nv40->curie, NV40TCL_BLEND_ENABLE, 1);
+		so_method(so, curie, NV40TCL_BLEND_ENABLE, 1);
 		so_data  (so, 0);
 	}
 
-	so_method(so, nv40->curie, NV40TCL_COLOR_MASK, 1);
+	so_method(so, curie, NV40TCL_COLOR_MASK, 1);
 	so_data  (so, (((cso->colormask & PIPE_MASK_A) ? (0x01 << 24) : 0) |
 		       ((cso->colormask & PIPE_MASK_R) ? (0x01 << 16) : 0) |
 		       ((cso->colormask & PIPE_MASK_G) ? (0x01 <<  8) : 0) |
 		       ((cso->colormask & PIPE_MASK_B) ? (0x01 <<  0) : 0)));
 
 	if (cso->logicop_enable) {
-		so_method(so, nv40->curie, NV40TCL_COLOR_LOGIC_OP_ENABLE, 2);
+		so_method(so, curie, NV40TCL_COLOR_LOGIC_OP_ENABLE, 2);
 		so_data  (so, 1);
 		so_data  (so, nvgl_logicop_func(cso->logicop_func));
 	} else {
-		so_method(so, nv40->curie, NV40TCL_COLOR_LOGIC_OP_ENABLE, 1);
+		so_method(so, curie, NV40TCL_COLOR_LOGIC_OP_ENABLE, 1);
 		so_data  (so, 0);
 	}
 
-	so_method(so, nv40->curie, NV40TCL_DITHER_ENABLE, 1);
+	so_method(so, curie, NV40TCL_DITHER_ENABLE, 1);
 	so_data  (so, cso->dither ? 1 : 0);
 
 	return (void *)so;
@@ -274,22 +275,22 @@ nv40_rasterizer_state_create(struct pipe_context *pipe,
 	 * 	offset_units / offset_scale
 	 */
 
-	so_method(so, nv40->curie, NV40TCL_SHADE_MODEL, 1);
+	so_method(so, nv40->hw->curie, NV40TCL_SHADE_MODEL, 1);
 	so_data  (so, cso->flatshade ? NV40TCL_SHADE_MODEL_FLAT :
 				       NV40TCL_SHADE_MODEL_SMOOTH);
 
-	so_method(so, nv40->curie, NV40TCL_LINE_WIDTH, 2);
+	so_method(so, nv40->hw->curie, NV40TCL_LINE_WIDTH, 2);
 	so_data  (so, (unsigned char)(cso->line_width * 8.0) & 0xff);
 	so_data  (so, cso->line_smooth ? 1 : 0);
-	so_method(so, nv40->curie, NV40TCL_LINE_STIPPLE_ENABLE, 2);
+	so_method(so, nv40->hw->curie, NV40TCL_LINE_STIPPLE_ENABLE, 2);
 	so_data  (so, cso->line_stipple_enable ? 1 : 0);
 	so_data  (so, (cso->line_stipple_pattern << 16) |
 		       cso->line_stipple_factor);
 
-	so_method(so, nv40->curie, NV40TCL_POINT_SIZE, 1);
+	so_method(so, nv40->hw->curie, NV40TCL_POINT_SIZE, 1);
 	so_data  (so, fui(cso->point_size));
 
-	so_method(so, nv40->curie, NV40TCL_POLYGON_MODE_FRONT, 6);
+	so_method(so, nv40->hw->curie, NV40TCL_POLYGON_MODE_FRONT, 6);
 	if (cso->front_winding == PIPE_WINDING_CCW) {
 		so_data(so, nvgl_polygon_mode(cso->fill_ccw));
 		so_data(so, nvgl_polygon_mode(cso->fill_cw));
@@ -330,10 +331,10 @@ nv40_rasterizer_state_create(struct pipe_context *pipe,
 	so_data(so, cso->poly_smooth ? 1 : 0);
 	so_data(so, cso->cull_mode != PIPE_WINDING_NONE ? 1 : 0);
 
-	so_method(so, nv40->curie, NV40TCL_POLYGON_STIPPLE_ENABLE, 1);
+	so_method(so, nv40->hw->curie, NV40TCL_POLYGON_STIPPLE_ENABLE, 1);
 	so_data  (so, cso->poly_stipple_enable ? 1 : 0);
 
-	so_method(so, nv40->curie, NV40TCL_POINT_SPRITE, 1);
+	so_method(so, nv40->hw->curie, NV40TCL_POINT_SPRITE, 1);
 	if (cso->point_sprite) {
 		unsigned psctl = (1 << 0), i;
 
@@ -374,18 +375,18 @@ nv40_depth_stencil_alpha_state_create(struct pipe_context *pipe,
 	struct nv40_context *nv40 = nv40_context(pipe);
 	struct nouveau_stateobj *so = so_new(32, 0);
 
-	so_method(so, nv40->curie, NV40TCL_DEPTH_FUNC, 3);
+	so_method(so, nv40->hw->curie, NV40TCL_DEPTH_FUNC, 3);
 	so_data  (so, nvgl_comparison_op(cso->depth.func));
 	so_data  (so, cso->depth.writemask ? 1 : 0);
 	so_data  (so, cso->depth.enabled ? 1 : 0);
 
-	so_method(so, nv40->curie, NV40TCL_ALPHA_TEST_ENABLE, 3);
+	so_method(so, nv40->hw->curie, NV40TCL_ALPHA_TEST_ENABLE, 3);
 	so_data  (so, cso->alpha.enabled ? 1 : 0);
 	so_data  (so, nvgl_comparison_op(cso->alpha.func));
 	so_data  (so, float_to_ubyte(cso->alpha.ref));
 
 	if (cso->stencil[0].enabled) {
-		so_method(so, nv40->curie, NV40TCL_STENCIL_FRONT_ENABLE, 8);
+		so_method(so, nv40->hw->curie, NV40TCL_STENCIL_FRONT_ENABLE, 8);
 		so_data  (so, cso->stencil[0].enabled ? 1 : 0);
 		so_data  (so, cso->stencil[0].write_mask);
 		so_data  (so, nvgl_comparison_op(cso->stencil[0].func));
@@ -395,12 +396,12 @@ nv40_depth_stencil_alpha_state_create(struct pipe_context *pipe,
 		so_data  (so, nvgl_stencil_op(cso->stencil[0].zfail_op));
 		so_data  (so, nvgl_stencil_op(cso->stencil[0].zpass_op));
 	} else {
-		so_method(so, nv40->curie, NV40TCL_STENCIL_FRONT_ENABLE, 1);
+		so_method(so, nv40->hw->curie, NV40TCL_STENCIL_FRONT_ENABLE, 1);
 		so_data  (so, 0);
 	}
 
 	if (cso->stencil[1].enabled) {
-		so_method(so, nv40->curie, NV40TCL_STENCIL_BACK_ENABLE, 8);
+		so_method(so, nv40->hw->curie, NV40TCL_STENCIL_BACK_ENABLE, 8);
 		so_data  (so, cso->stencil[1].enabled ? 1 : 0);
 		so_data  (so, cso->stencil[1].write_mask);
 		so_data  (so, nvgl_comparison_op(cso->stencil[1].func));
@@ -410,7 +411,7 @@ nv40_depth_stencil_alpha_state_create(struct pipe_context *pipe,
 		so_data  (so, nvgl_stencil_op(cso->stencil[1].zfail_op));
 		so_data  (so, nvgl_stencil_op(cso->stencil[1].zpass_op));
 	} else {
-		so_method(so, nv40->curie, NV40TCL_STENCIL_BACK_ENABLE, 1);
+		so_method(so, nv40->hw->curie, NV40TCL_STENCIL_BACK_ENABLE, 1);
 		so_data  (so, 0);
 	}
 
@@ -505,7 +506,7 @@ nv40_set_blend_color(struct pipe_context *pipe,
 	struct nv40_context *nv40 = nv40_context(pipe);
 	struct nouveau_stateobj *so = so_new(2, 0);
 
-	so_method(so, nv40->curie, NV40TCL_BLEND_COLOR, 1);
+	so_method(so, nv40->hw->curie, NV40TCL_BLEND_COLOR, 1);
 	so_data  (so, ((float_to_ubyte(bcol->color[3]) << 24) |
 		       (float_to_ubyte(bcol->color[0]) << 16) |
 		       (float_to_ubyte(bcol->color[1]) <<  8) |
@@ -611,73 +612,73 @@ nv40_set_framebuffer_state(struct pipe_context *pipe,
 	}
 
 	if (rt_enable & NV40TCL_RT_ENABLE_COLOR0) {
-		so_method(so, nv40->curie, NV40TCL_DMA_COLOR0, 1);
+		so_method(so, nv40->hw->curie, NV40TCL_DMA_COLOR0, 1);
 		so_reloc (so, rt[0]->buffer, 0, rt_flags | NOUVEAU_BO_OR,
 			  nv40->nvws->channel->vram->handle,
 			  nv40->nvws->channel->gart->handle);
-		so_method(so, nv40->curie, NV40TCL_COLOR0_PITCH, 2);
+		so_method(so, nv40->hw->curie, NV40TCL_COLOR0_PITCH, 2);
 		so_data  (so, rt[0]->pitch * rt[0]->cpp);
 		so_reloc (so, rt[0]->buffer, rt[0]->offset, rt_flags |
 			  NOUVEAU_BO_LOW, 0, 0);
 	}
 
 	if (rt_enable & NV40TCL_RT_ENABLE_COLOR1) {
-		so_method(so, nv40->curie, NV40TCL_DMA_COLOR1, 1);
+		so_method(so, nv40->hw->curie, NV40TCL_DMA_COLOR1, 1);
 		so_reloc (so, rt[1]->buffer, 0, rt_flags | NOUVEAU_BO_OR,
 			  nv40->nvws->channel->vram->handle,
 			  nv40->nvws->channel->gart->handle);
-		so_method(so, nv40->curie, NV40TCL_COLOR1_OFFSET, 2);
+		so_method(so, nv40->hw->curie, NV40TCL_COLOR1_OFFSET, 2);
 		so_reloc (so, rt[1]->buffer, rt[1]->offset, rt_flags |
 			  NOUVEAU_BO_LOW, 0, 0);
 		so_data  (so, rt[1]->pitch * rt[1]->cpp);
 	}
 
 	if (rt_enable & NV40TCL_RT_ENABLE_COLOR2) {
-		so_method(so, nv40->curie, NV40TCL_DMA_COLOR2, 1);
+		so_method(so, nv40->hw->curie, NV40TCL_DMA_COLOR2, 1);
 		so_reloc (so, rt[2]->buffer, 0, rt_flags | NOUVEAU_BO_OR,
 			  nv40->nvws->channel->vram->handle,
 			  nv40->nvws->channel->gart->handle);
-		so_method(so, nv40->curie, NV40TCL_COLOR2_OFFSET, 1);
+		so_method(so, nv40->hw->curie, NV40TCL_COLOR2_OFFSET, 1);
 		so_reloc (so, rt[2]->buffer, rt[2]->offset, rt_flags |
 			  NOUVEAU_BO_LOW, 0, 0);
-		so_method(so, nv40->curie, NV40TCL_COLOR2_PITCH, 1);
+		so_method(so, nv40->hw->curie, NV40TCL_COLOR2_PITCH, 1);
 		so_data  (so, rt[2]->pitch * rt[2]->cpp);
 	}
 
 	if (rt_enable & NV40TCL_RT_ENABLE_COLOR3) {
-		so_method(so, nv40->curie, NV40TCL_DMA_COLOR3, 1);
+		so_method(so, nv40->hw->curie, NV40TCL_DMA_COLOR3, 1);
 		so_reloc (so, rt[3]->buffer, 0, rt_flags | NOUVEAU_BO_OR,
 			  nv40->nvws->channel->vram->handle,
 			  nv40->nvws->channel->gart->handle);
-		so_method(so, nv40->curie, NV40TCL_COLOR3_OFFSET, 1);
+		so_method(so, nv40->hw->curie, NV40TCL_COLOR3_OFFSET, 1);
 		so_reloc (so, rt[3]->buffer, rt[3]->offset, rt_flags |
 			  NOUVEAU_BO_LOW, 0, 0);
-		so_method(so, nv40->curie, NV40TCL_COLOR3_PITCH, 1);
+		so_method(so, nv40->hw->curie, NV40TCL_COLOR3_PITCH, 1);
 		so_data  (so, rt[3]->pitch * rt[3]->cpp);
 	}
 
 	if (zeta_format) {
-		so_method(so, nv40->curie, NV40TCL_DMA_ZETA, 1);
+		so_method(so, nv40->hw->curie, NV40TCL_DMA_ZETA, 1);
 		so_reloc (so, zeta->buffer, 0, rt_flags | NOUVEAU_BO_OR,
 			  nv40->nvws->channel->vram->handle,
 			  nv40->nvws->channel->gart->handle);
-		so_method(so, nv40->curie, NV40TCL_ZETA_OFFSET, 1);
+		so_method(so, nv40->hw->curie, NV40TCL_ZETA_OFFSET, 1);
 		so_reloc (so, zeta->buffer, zeta->offset, rt_flags |
 			  NOUVEAU_BO_LOW, 0, 0);
-		so_method(so, nv40->curie, NV40TCL_ZETA_PITCH, 1);
+		so_method(so, nv40->hw->curie, NV40TCL_ZETA_PITCH, 1);
 		so_data  (so, zeta->pitch * zeta->cpp);
 	}
 
-	so_method(so, nv40->curie, NV40TCL_RT_ENABLE, 1);
+	so_method(so, nv40->hw->curie, NV40TCL_RT_ENABLE, 1);
 	so_data  (so, rt_enable);
-	so_method(so, nv40->curie, NV40TCL_RT_HORIZ, 3);
+	so_method(so, nv40->hw->curie, NV40TCL_RT_HORIZ, 3);
 	so_data  (so, (w << 16) | 0);
 	so_data  (so, (h << 16) | 0);
 	so_data  (so, rt_format);
-	so_method(so, nv40->curie, NV40TCL_VIEWPORT_HORIZ, 2);
+	so_method(so, nv40->hw->curie, NV40TCL_VIEWPORT_HORIZ, 2);
 	so_data  (so, (w << 16) | 0);
 	so_data  (so, (h << 16) | 0);
-	so_method(so, nv40->curie, NV40TCL_VIEWPORT_CLIP_HORIZ(0), 2);
+	so_method(so, nv40->hw->curie, NV40TCL_VIEWPORT_CLIP_HORIZ(0), 2);
 	so_data  (so, ((w - 1) << 16) | 0);
 	so_data  (so, ((h - 1) << 16) | 0);
 
@@ -694,7 +695,7 @@ nv40_set_polygon_stipple(struct pipe_context *pipe,
 	struct nouveau_stateobj *so = so_new(33, 0);
 	unsigned i;
 
-	so_method(so, nv40->curie, NV40TCL_POLYGON_STIPPLE_PATTERN(0), 32);
+	so_method(so, nv40->hw->curie, NV40TCL_POLYGON_STIPPLE_PATTERN(0), 32);
 	for (i = 0; i < 32; i++)
 		so_data(so, stipple->stipple[i]);
 
@@ -710,7 +711,7 @@ nv40_set_scissor_state(struct pipe_context *pipe,
 	struct nv40_context *nv40 = nv40_context(pipe);
 	struct nouveau_stateobj *so = so_new(3, 0);
 
-	so_method(so, nv40->curie, NV40TCL_SCISSOR_HORIZ, 2);
+	so_method(so, nv40->hw->curie, NV40TCL_SCISSOR_HORIZ, 2);
 	so_data  (so, ((s->maxx - s->minx) << 16) | s->minx);
 	so_data  (so, ((s->maxy - s->miny) << 16) | s->miny);
 
@@ -726,7 +727,7 @@ nv40_set_viewport_state(struct pipe_context *pipe,
 	struct nv40_context *nv40 = nv40_context(pipe);
 	struct nouveau_stateobj *so = so_new(9, 0);
 
-	so_method(so, nv40->curie, NV40TCL_VIEWPORT_TRANSLATE_X, 8);
+	so_method(so, nv40->hw->curie, NV40TCL_VIEWPORT_TRANSLATE_X, 8);
 	so_data  (so, fui(vpt->translate[0]));
 	so_data  (so, fui(vpt->translate[1]));
 	so_data  (so, fui(vpt->translate[2]));
diff --git a/src/mesa/pipe/nv40/nv40_vbo.c b/src/mesa/pipe/nv40/nv40_vbo.c
index fd1d884193b..552058b3ae7 100644
--- a/src/mesa/pipe/nv40/nv40_vbo.c
+++ b/src/mesa/pipe/nv40/nv40_vbo.c
@@ -115,9 +115,9 @@ nv40_vbo_arrays_update(struct nv40_context *nv40, struct pipe_buffer *ib,
 	num_hw++;
 
 	vtxbuf = so_new(20, 18);
-	so_method(vtxbuf, nv40->curie, NV40TCL_VTXBUF_ADDRESS(0), num_hw);
+	so_method(vtxbuf, nv40->hw->curie, NV40TCL_VTXBUF_ADDRESS(0), num_hw);
 	vtxfmt = so_new(17, 0);
-	so_method(vtxfmt, nv40->curie, NV40TCL_VTXFMT(0), num_hw);
+	so_method(vtxfmt, nv40->hw->curie, NV40TCL_VTXFMT(0), num_hw);
 
 	inputs = vp->ir;
 	for (hw = 0; hw < num_hw; hw++) {
@@ -149,7 +149,7 @@ nv40_vbo_arrays_update(struct nv40_context *nv40, struct pipe_buffer *ib,
 	}
 
 	if (ib) {
-		so_method(vtxbuf, nv40->curie, NV40TCL_IDXBUF_ADDRESS, 2);
+		so_method(vtxbuf, nv40->hw->curie, NV40TCL_IDXBUF_ADDRESS, 2);
 		so_reloc (vtxbuf, ib, 0, vb_flags | NOUVEAU_BO_LOW, 0, 0);
 		so_reloc (vtxbuf, ib, ib_format, vb_flags | NOUVEAU_BO_OR,
 			  0, NV40TCL_IDXBUF_FORMAT_DMA1);
@@ -390,7 +390,7 @@ nv40_draw_elements(struct pipe_context *pipe,
 	/* 0x4497 doesn't support real index buffers, and there doesn't appear
 	 * to be support on any chipset for 8-bit indices.
 	 */
-	if (nv40->curie->grclass == NV44TCL || indexSize == 1) {
+	if (nv40->hw->curie->grclass == NV44TCL || indexSize == 1) {
 		nv40_draw_elements_inline(pipe, indexBuffer, indexSize,
 					  mode, start, count);
 	} else {
diff --git a/src/mesa/pipe/nv40/nv40_vertprog.c b/src/mesa/pipe/nv40/nv40_vertprog.c
index e15ddbbcde5..415b3c70c79 100644
--- a/src/mesa/pipe/nv40/nv40_vertprog.c
+++ b/src/mesa/pipe/nv40/nv40_vertprog.c
@@ -648,7 +648,7 @@ nv40_vertprog_bind(struct nv40_context *nv40, struct nv40_vertex_program *vp)
 
 	/* Allocate hw vtxprog exec slots */
 	if (!vp->exec) {
-		struct nouveau_resource *heap = nv40->vertprog.exec_heap;
+		struct nouveau_resource *heap = nv40->hw->vp_exec_heap;
 		uint vplen = vp->nr_insns;
 
 		if (nvws->res_alloc(heap, vplen, vp, &vp->exec)) {
@@ -668,7 +668,7 @@ nv40_vertprog_bind(struct nv40_context *nv40, struct nv40_vertex_program *vp)
 
 	/* Allocate hw vtxprog const slots */
 	if (vp->nr_consts && !vp->data) {
-		struct nouveau_resource *heap = nv40->vertprog.data_heap;
+		struct nouveau_resource *heap = nv40->hw->vp_data_heap;
 
 		if (nvws->res_alloc(heap, vp->nr_consts, vp, &vp->data)) {
 			while (heap->next && heap->size < vp->nr_consts) {