From: Jacob Lifshay Date: Wed, 13 Dec 2023 00:50:27 +0000 (-0800) Subject: caller.py: fix undefined ffirst, hope I guessed the correct value X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=ae8bacd2eb456b0b83a4d29f7de23474eff90eed;p=openpower-isa.git caller.py: fix undefined ffirst, hope I guessed the correct value --- diff --git a/src/openpower/decoder/isa/caller.py b/src/openpower/decoder/isa/caller.py index da73f98b..b0b09f06 100644 --- a/src/openpower/decoder/isa/caller.py +++ b/src/openpower/decoder/isa/caller.py @@ -2924,6 +2924,7 @@ class ISACaller(ISACallerHelper, ISAFPHelpers, StepLoop): # because there *is* no destination register # (SV normally only terminates on 1st scalar reg written # except in [slightly-misnamed] mapreduce mode) + ffirst = yield from is_ffirst_mode(self.dec2) if insn_name.startswith("sv.bc") or ffirst: self.update_pc_next() return False