From: Florent Kermarrec <florent@enjoy-digital.fr>
Date: Fri, 11 Oct 2019 12:28:29 +0000 (+0200)
Subject: platforms/versa_ecp5: add serdes refclk/sma
X-Git-Tag: 24jan2021_ls180~915
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=ae9c25b74ff12b31abf123ecfa3c7c3a09b4f18f;p=litex.git

platforms/versa_ecp5: add serdes refclk/sma
---

diff --git a/litex/boards/platforms/versa_ecp5.py b/litex/boards/platforms/versa_ecp5.py
index 7375895f..ccf289e9 100644
--- a/litex/boards/platforms/versa_ecp5.py
+++ b/litex/boards/platforms/versa_ecp5.py
@@ -121,6 +121,26 @@ _io = [
         Subsignal("tx_n", Pins("W5")),
         Subsignal("perst", Pins("A6"), IOStandard("LVCMOS33")),
     ),
+
+    ("refclk_en", 0, Pins("C12"), IOStandard("LVCMOS33")),
+    ("refclk_rst_n", 0, Pins("R1"), IOStandard("LVCMOS33")),
+    ("refclk", 0,
+        Subsignal("p", Pins("Y11")),
+        Subsignal("n", Pins("Y12")),
+    ),
+    ("refclk", 1,
+        Subsignal("p", Pins("Y19")),
+        Subsignal("n", Pins("W20")),
+    ),
+
+    ("sma_tx", 0,
+        Subsignal("p", Pins("W8")),
+        Subsignal("n", Pins("W9")),
+    ),
+    ("sma_rx", 0,
+        Subsignal("p", Pins("Y7")),
+        Subsignal("n", Pins("Y8")),
+    ),
 ]