From: lkcl <lkcl@web>
Date: Wed, 4 Aug 2021 15:53:53 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: DRAFT_SVP64_0_1~497
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=aea0c4bebb018bfe9ff03dd636342a35eff72452;p=libreriscv.git

---

diff --git a/openpower/sv/branches.mdwn b/openpower/sv/branches.mdwn
index b30e37ad6..7d391685c 100644
--- a/openpower/sv/branches.mdwn
+++ b/openpower/sv/branches.mdwn
@@ -158,13 +158,11 @@ available for Power ISA v3.0B** i.e. only when embedded in an SVP64
 Prefix Context do these and all other parts of this specification
 apply.
 
-Form: SVL-Form (see [[isatables/fields.text]])
-
-| 0.5|6.10|11.15|16..21|22| 23...25  | 30 |31|  name   |
-| -- | -- | --- | ---- |--| -------- | -- |--| ------- |
-|16  | RT | RA  | SVi  |/ | ms vs vf | Rc |LR| bc      |
-
+Form: B-Form (see [[isatables/fields.text]])
 
+| 0.5|6.10|11.15|16..29| 30 |31|  name   |
+| -- | -- | --- | ---- | -- |--| ------- |
+|16  | BO | BI  | BD   | Rc |LR| sv.bc   |
 
 Pseudocode for Rc in sv.bc