From: Luke Kenneth Casson Leighton Date: Fri, 9 Oct 2020 10:51:18 +0000 (+0100) Subject: drop in "undefined" function into ISAcaller namespace X-Git-Tag: 24jan2021_ls180~171 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=af1382bc5f865a7ba66fa1979301ad623151d6da;p=soc.git drop in "undefined" function into ISAcaller namespace --- diff --git a/src/soc/decoder/isa/caller.py b/src/soc/decoder/isa/caller.py index 9252bfef..ad724a11 100644 --- a/src/soc/decoder/isa/caller.py +++ b/src/soc/decoder/isa/caller.py @@ -16,7 +16,7 @@ from soc.decoder.selectable_int import (FieldSelectableInt, SelectableInt, selectconcat) from soc.decoder.power_enums import (spr_dict, spr_byname, XER_bits, insns, MicrOp) -from soc.decoder.helpers import exts, gtu, ltu +from soc.decoder.helpers import exts, gtu, ltu, undefined from soc.consts import PIb, MSRb # big-endian (PowerISA versions) from collections import namedtuple @@ -336,7 +336,7 @@ class ISACaller: #self.cr = FieldSelectableInt(self._cr, list(range(32, 64))) # "undefined", just set to variable-bit-width int (use exts "max") - self.undefined = SelectableInt(0, 256) # TODO, not hard-code 256! + #self.undefined = SelectableInt(0, 256) # TODO, not hard-code 256! self.namespace = {} self.namespace.update(self.spr) @@ -348,7 +348,7 @@ class ISACaller: 'CIA': self.pc.CIA, 'CR': self.cr, 'MSR': self.msr, - 'undefined': self.undefined, + 'undefined': undefined, 'mode_is_64bit': True, 'SO': XER_bits['SO'] })