From: Andreas Krebbel Date: Wed, 24 Jun 2015 06:47:47 +0000 (+0000) Subject: S/390: Switch mode attribute to bhfgq for vec scatter X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=af77d1df021462d093418edfc130ed37922f4994;p=gcc.git S/390: Switch mode attribute to bhfgq for vec scatter gcc/ChangeLog: 2015-06-24 Andreas Krebbel * config/s390/vx-builtins.md ("vec_scatter_element_") ("vec_scatter_element_SI"): Replace gf mode attribute with bhfgq. From-SVN: r224874 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index c4aceca2351..be625c5b06b 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2015-06-24 Andreas Krebbel + + * config/s390/vx-builtins.md + ("vec_scatter_element_") + ("vec_scatter_element_SI"): Replace gf mode + attribute with bhfgq. + 2015-06-24 Andreas Krebbel * config/s390/s390-builtins.def: Fix vpopct instruction comments. diff --git a/gcc/config/s390/vx-builtins.md b/gcc/config/s390/vx-builtins.md index e306ee8bd05..35ada1371ff 100644 --- a/gcc/config/s390/vx-builtins.md +++ b/gcc/config/s390/vx-builtins.md @@ -414,7 +414,7 @@ (unspec: [(match_operand:V_HW_64 0 "register_operand" "v") (match_dup 3)] UNSPEC_VEC_EXTRACT))] "TARGET_VX && !TARGET_64BIT" - "vsce\t%v0,%O2(%v1,%R2),%3" + "vsce\t%v0,%O2(%v1,%R2),%3" [(set_attr "op_type" "VRV")]) ; Element size and target adress size is the same @@ -428,7 +428,7 @@ (unspec: [(match_operand:V_HW_32_64 0 "register_operand" "v") (match_dup 3)] UNSPEC_VEC_EXTRACT))] "TARGET_VX" - "vsce\t%v0,%O2(%v1,%R2),%3" + "vsce\t%v0,%O2(%v1,%R2),%3" [(set_attr "op_type" "VRV")]) ; Depending on the address size we have to expand a different pattern.