From: Eric Anholt Date: Tue, 16 Oct 2012 00:48:07 +0000 (-0700) Subject: i965/vs: Do the temporary allocation in emit_scratch_write(). X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=af911b2819e5175008c67e6939d88ec28cda69d1;p=mesa.git i965/vs: Do the temporary allocation in emit_scratch_write(). Both callers were doing basically the same thing, just written differently. Reviewed-by: Kenneth Graunke --- diff --git a/src/mesa/drivers/dri/i965/brw_vec4.h b/src/mesa/drivers/dri/i965/brw_vec4.h index d6d6c8a904b..a647215b7ec 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4.h +++ b/src/mesa/drivers/dri/i965/brw_vec4.h @@ -427,7 +427,6 @@ public: src_reg orig_src, int base_offset); void emit_scratch_write(vec4_instruction *inst, - src_reg temp, int base_offset); void emit_pull_constant_load(vec4_instruction *inst, dst_reg dst, diff --git a/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp b/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp index a2381bc30f2..ac3d401ac3f 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp @@ -346,16 +346,7 @@ vec4_visitor::spill_reg(int spill_reg_nr) } if (inst->dst.file == GRF && inst->dst.reg == spill_reg_nr) { - dst_reg spill_reg = inst->dst; - inst->dst.reg = virtual_grf_alloc(1); - - /* We don't want a swizzle when reading from the source; read the - * whole register and use spill_reg's writemask to select which - * channels to write. - */ - src_reg temp = src_reg(inst->dst); - temp.swizzle = BRW_SWIZZLE_XYZW; - emit_scratch_write(inst, temp, spill_offset); + emit_scratch_write(inst, spill_offset); } } diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp index 60295adbd87..310f3470dd7 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp @@ -2464,12 +2464,15 @@ vec4_visitor::emit_scratch_read(vec4_instruction *inst, * @base_offset is measured in 32-byte units (the size of a register). */ void -vec4_visitor::emit_scratch_write(vec4_instruction *inst, - src_reg temp, int base_offset) +vec4_visitor::emit_scratch_write(vec4_instruction *inst, int base_offset) { int reg_offset = base_offset + inst->dst.reg_offset; src_reg index = get_scratch_offset(inst, inst->dst.reladdr, reg_offset); + /* Create a temporary register to store *inst's result in. */ + src_reg temp = src_reg(this, glsl_type::vec4_type); + temp.type = inst->dst.type; + dst_reg dst = dst_reg(brw_writemask(brw_vec8_grf(0, 0), inst->dst.writemask)); vec4_instruction *write = SCRATCH_WRITE(dst, temp, index); @@ -2477,6 +2480,11 @@ vec4_visitor::emit_scratch_write(vec4_instruction *inst, write->ir = inst->ir; write->annotation = inst->annotation; inst->insert_after(write); + + inst->dst.file = temp.file; + inst->dst.reg = temp.reg; + inst->dst.reg_offset = temp.reg_offset; + inst->dst.reladdr = NULL; } /** @@ -2531,14 +2539,7 @@ vec4_visitor::move_grf_array_access_to_scratch() current_annotation = inst->annotation; if (inst->dst.file == GRF && scratch_loc[inst->dst.reg] != -1) { - src_reg temp = src_reg(this, glsl_type::vec4_type); - - emit_scratch_write(inst, temp, scratch_loc[inst->dst.reg]); - - inst->dst.file = temp.file; - inst->dst.reg = temp.reg; - inst->dst.reg_offset = temp.reg_offset; - inst->dst.reladdr = NULL; + emit_scratch_write(inst, scratch_loc[inst->dst.reg]); } for (int i = 0 ; i < 3; i++) {