From: Andreas Hansson <andreas.hansson@arm.com>
Date: Fri, 6 Nov 2015 08:26:42 +0000 (-0500)
Subject: config: Update memtest to stress test cache clusivity
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=afa252b0b962be0192b6badf81d2d39ec4f40e4f;p=gem5.git

config: Update memtest to stress test cache clusivity

This patch adds an new twist to the memtest cache hierarchy, in that
it switches from mostly inclusive to mostly exclusive at every level
in the tree. This has helped weed out plenty issues, and serves as a
good stress tests.
---

diff --git a/configs/example/memtest.py b/configs/example/memtest.py
index 08f134533..354451a61 100644
--- a/configs/example/memtest.py
+++ b/configs/example/memtest.py
@@ -177,7 +177,7 @@ else:
 # Define a prototype L1 cache that we scale for all successive levels
 proto_l1 = Cache(size = '32kB', assoc = 4,
                  hit_latency = 1, response_latency = 1,
-                 tgts_per_mshr = 8)
+                 tgts_per_mshr = 8, clusivity = 'mostly_incl')
 
 if options.blocking:
      proto_l1.mshrs = 1
@@ -197,6 +197,15 @@ for scale in cachespec[:-1]:
      next.response_latency = prev.response_latency * 10
      next.assoc = prev.assoc * scale
      next.mshrs = prev.mshrs * scale
+
+     # Swap the inclusivity/exclusivity at each level. L2 is mostly
+     # exclusive with respect to L1, L3 mostly inclusive, L4 mostly
+     # exclusive etc.
+     if (prev.clusivity.value == 'mostly_incl'):
+          next.clusivity = 'mostly_excl'
+     else:
+          next.clusivity = 'mostly_incl'
+
      cache_proto.insert(0, next)
 
 # Make a prototype for the tester to be used throughout