From: Dmitry Selyutin <ghostmansd@gmail.com>
Date: Mon, 19 Sep 2022 21:24:37 +0000 (+0300)
Subject: power_insn: provide SVL/CTR branch fields
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=afd00f389eeae9a187f92cad523f910df99357d0;p=openpower-isa.git

power_insn: provide SVL/CTR branch fields
---

diff --git a/src/openpower/decoder/power_insn.py b/src/openpower/decoder/power_insn.py
index f336acd3..edc103bd 100644
--- a/src/openpower/decoder/power_insn.py
+++ b/src/openpower/decoder/power_insn.py
@@ -1723,13 +1723,15 @@ class CROpRM(CROpBaseRM):
 # ********************
 # Branches mode
 # https://libre-soc.org/openpower/sv/branches/
-class BranchBaseRM(BaseRM):
+class BranchBaseRM(SZBaseRM, BaseRM):
     ALL: BaseRM[4]
     SNZ: BaseRM[5]
     SL: BaseRM[17]
     SLu: BaseRM[18]
     LRu: BaseRM[22]
     sz: BaseRM[23]
+    CTR: BaseRM[19]
+    VLS: BaseRM[20]
 
 
 class BranchSimpleRM(BranchBaseRM):
@@ -1765,6 +1767,7 @@ class RM(BaseRM):
     ldst_imm: LDSTImmRM
     ldst_idx: LDSTIdxRM
     cr_op: CROpRM
+    branch: BranchRM
 
     def select(self, record, Rc):
         rm = self