From: Jacob Lifshay Date: Wed, 10 May 2023 05:17:49 +0000 (-0700) Subject: change FPSCR to a required parameter of ISACallerHelper X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=b024f03c258a7651893f485cc0b7e2d6e6f4c90f;p=openpower-isa.git change FPSCR to a required parameter of ISACallerHelper --- diff --git a/src/openpower/decoder/helpers.py b/src/openpower/decoder/helpers.py index cb4f5add..6f451972 100644 --- a/src/openpower/decoder/helpers.py +++ b/src/openpower/decoder/helpers.py @@ -841,8 +841,11 @@ def log2(val): class ISACallerHelper: - def __init__(self, XLEN): + def __init__(self, XLEN, FPSCR): self.__XLEN = XLEN + if FPSCR is None: + FPSCR = FPSCRState() + self.__FPSCR = FPSCR @property def XLEN(self): @@ -850,10 +853,7 @@ class ISACallerHelper: @property def FPSCR(self): - # fallback for when not used through ISACaller - # needed for tests that use DOUBLE2SINGLE without using ISACaller - self.__dict__["FPSCR"] = retval = FPSCRState() - return retval + return self.__FPSCR def EXTZXL(self, value, bits=None): if bits is None: @@ -942,7 +942,8 @@ class ISACallerHelper: class HelperTests(unittest.TestCase, ISACallerHelper): def __init__(self, *args, **kwargs): - ISACallerHelper.__init__(self, 64) # TODO: dynamic (64/32/16/8) + # TODO: dynamic (64/32/16/8) + ISACallerHelper.__init__(self, 64, FPSCR=None) unittest.TestCase.__init__(self, *args, **kwargs) def test_MASK(self): diff --git a/src/openpower/decoder/isa/caller.py b/src/openpower/decoder/isa/caller.py index 7671bc67..e3a3473c 100644 --- a/src/openpower/decoder/isa/caller.py +++ b/src/openpower/decoder/isa/caller.py @@ -1265,7 +1265,7 @@ class ISACaller(ISACallerHelper, ISAFPHelpers, StepLoop): self.decoder = decoder2.dec self.dec2 = decoder2 - super().__init__(XLEN=self.namespace["XLEN"]) + super().__init__(XLEN=self.namespace["XLEN"], FPSCR=self.fpscr) @property def XLEN(self): diff --git a/src/openpower/decoder/isa/test_caller_svp64_dct.py b/src/openpower/decoder/isa/test_caller_svp64_dct.py index 0e3796b4..7fc6260c 100644 --- a/src/openpower/decoder/isa/test_caller_svp64_dct.py +++ b/src/openpower/decoder/isa/test_caller_svp64_dct.py @@ -15,7 +15,7 @@ from openpower.sv.trans.svp64 import SVP64Asm # really bad hack. need to access the DOUBLE2SINGLE function auto-generated # from pseudo-code. -fph = ISACallerFnHelper(XLEN=64) +fph = ISACallerFnHelper(XLEN=64, FPSCR=None) def transform_inner_radix2_dct(vec, ctable): diff --git a/src/openpower/decoder/isa/test_caller_svp64_fft.py b/src/openpower/decoder/isa/test_caller_svp64_fft.py index 649918a0..67a6a4e9 100644 --- a/src/openpower/decoder/isa/test_caller_svp64_fft.py +++ b/src/openpower/decoder/isa/test_caller_svp64_fft.py @@ -11,7 +11,7 @@ from openpower.sv.trans.svp64 import SVP64Asm # really bad hack. need to access the DOUBLE2SINGLE function auto-generated # from pseudo-code. -fph = ISACallerFnHelper(XLEN=64) +fph = ISACallerFnHelper(XLEN=64, FPSCR=None) def transform_radix2(vec, exptable, reverse=False): diff --git a/src/openpower/decoder/isa/test_caller_transcendentals.py b/src/openpower/decoder/isa/test_caller_transcendentals.py index 306ab1f6..3571c1b0 100644 --- a/src/openpower/decoder/isa/test_caller_transcendentals.py +++ b/src/openpower/decoder/isa/test_caller_transcendentals.py @@ -11,7 +11,7 @@ from openpower.sv.trans.svp64 import SVP64Asm # really bad hack. need to access the DOUBLE2SINGLE function auto-generated # from pseudo-code. -fph = ISACallerFnHelper(XLEN=64) +fph = ISACallerFnHelper(XLEN=64, FPSCR=None) class FPTranscendentalsTestCase(FHDLTestCase):