From: Alan Modra Date: Thu, 19 May 2005 07:02:14 +0000 (+0000) Subject: * config/tc-ppc.c (parse_cpu): Handle "-mpower5". X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=b0648eec6148de0ae9cd7c1b099471624483277f;p=binutils-gdb.git * config/tc-ppc.c (parse_cpu): Handle "-mpower5". (md_show_usage): Document it. (ppc_setup_opcodes): Insert POWER5 mnemonics. * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower5". --- diff --git a/gas/ChangeLog b/gas/ChangeLog index d2f51360e99..108930498ac 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,10 @@ +2005-05-19 Anton Blanchard + + * config/tc-ppc.c (parse_cpu): Handle "-mpower5". + (md_show_usage): Document it. + (ppc_setup_opcodes): Insert POWER5 mnemonics. + * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower5". + 2005-05-19 Jan Beulich * config/tc-ia64.c (dot_endp): Don't use global symbol for unwind diff --git a/gas/config/tc-ppc.c b/gas/config/tc-ppc.c index d7eb9f690f0..e5fc2d0ad39 100644 --- a/gas/config/tc-ppc.c +++ b/gas/config/tc-ppc.c @@ -906,6 +906,12 @@ parse_cpu (const char *arg) ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64 | PPC_OPCODE_POWER4); } + else if (strcmp (arg, "power5") == 0) + { + ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC + | PPC_OPCODE_64 | PPC_OPCODE_POWER4 + | PPC_OPCODE_POWER5); + } /* -mcom means assemble for the common intersection between Power and PowerPC. At present, we just allow the union, rather than the intersection. */ @@ -1100,6 +1106,7 @@ PowerPC options:\n\ -mbooke64 generate code for 64-bit PowerPC BookE\n\ -mbooke, mbooke32 generate code for 32-bit PowerPC BookE\n\ -mpower4 generate code for Power4 architecture\n\ +-mpower5 generate code for Power5 architecture\n\ -mcom generate code Power/PowerPC common instructions\n\ -many generate code for any architecture (PWR/PWRX/PPC)\n")); fprintf (stream, _("\ @@ -1255,7 +1262,10 @@ ppc_setup_opcodes (void) || (ppc_cpu & PPC_OPCODE_BOOKE) == 0) && ((op->flags & (PPC_OPCODE_POWER4 | PPC_OPCODE_NOPOWER4)) == 0 || ((op->flags & PPC_OPCODE_POWER4) - == (ppc_cpu & PPC_OPCODE_POWER4)))) + == (ppc_cpu & PPC_OPCODE_POWER4))) + && ((op->flags & PPC_OPCODE_POWER5) == 0 + || ((op->flags & PPC_OPCODE_POWER5) + == (ppc_cpu & PPC_OPCODE_POWER5)))) { const char *retval; diff --git a/gas/doc/c-ppc.texi b/gas/doc/c-ppc.texi index 848540f9c33..63498e9b3ce 100644 --- a/gas/doc/c-ppc.texi +++ b/gas/doc/c-ppc.texi @@ -73,6 +73,9 @@ Generate code for processors with AltiVec instructions. @item -mpower4 Generate code for Power4 architecture. +@item -mpower5 +Generate code for Power5 architecture. + @item -mcom Generate code Power/PowerPC common instructions.