From: Dmitry Selyutin <ghostmansd@gmail.com>
Date: Sun, 6 Nov 2022 09:29:55 +0000 (+0300)
Subject: power_insn: support FPR operands assembly
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=b088f5c3aa20628f6d447cdedada3524286cab05;p=openpower-isa.git

power_insn: support FPR operands assembly
---

diff --git a/src/openpower/decoder/power_insn.py b/src/openpower/decoder/power_insn.py
index 933741b8..279db99c 100644
--- a/src/openpower/decoder/power_insn.py
+++ b/src/openpower/decoder/power_insn.py
@@ -759,6 +759,14 @@ class GPROperand(RegisterOperand):
 
 
 class FPROperand(RegisterOperand):
+    def assemble(self, value, insn, record):
+        if isinstance(value, str):
+            value = value.lower()
+            if value.startswith("f"):
+                value = value[1:]
+            value = int(value, 0)
+        return super().assemble(value=value, insn=insn, record=record)
+
     def disassemble(self, insn, record,
             verbosity=Verbosity.NORMAL, indent=""):
         prefix = "" if (verbosity <= Verbosity.SHORT) else "f"