From: Jan Beulich Date: Tue, 19 Apr 2022 07:24:24 +0000 (+0200) Subject: x86/Intel: test non-legacy VCVT{,U}SI2SH insn forms X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=b0970402387a2258a59f944b4fb1e539a2e73cd1;p=binutils-gdb.git x86/Intel: test non-legacy VCVT{,U}SI2SH insn forms For an unclear reason corresponding AVX512F tests were apparently not cloned or used as reference here, and instead the bogus legacy forms of the insns (with the embedded rounding specifier not last) were used. --- diff --git a/gas/testsuite/gas/i386/avx512_fp16.s b/gas/testsuite/gas/i386/avx512_fp16.s index b4f99c7d07e..9e6af14da64 100644 --- a/gas/testsuite/gas/i386/avx512_fp16.s +++ b/gas/testsuite/gas/i386/avx512_fp16.s @@ -891,7 +891,7 @@ _start: vcvtsh2usi edx, WORD PTR [ecx+254] #AVX512-FP16 Disp8(7f) vcvtsh2usi edx, WORD PTR [edx-256] #AVX512-FP16 Disp8(80) vcvtsi2sh xmm6, xmm5, edx #AVX512-FP16 - vcvtsi2sh xmm6, xmm5, {rn-sae}, edx #AVX512-FP16 HAS_SAE RC_CTRL + vcvtsi2sh xmm6, xmm5, edx, {rn-sae} #AVX512-FP16 HAS_SAE RC_CTRL vcvtsi2sh xmm6, xmm5, DWORD PTR [esp+esi*8+0x10000000] #AVX512-FP16 vcvtsi2sh xmm6, xmm5, DWORD PTR [ecx] #AVX512-FP16 vcvtsi2sh xmm6, xmm5, DWORD PTR [ecx+508] #AVX512-FP16 Disp8(7f) @@ -972,7 +972,7 @@ _start: vcvtuqq2ph xmm6, ZMMWORD PTR [ecx+8128] #AVX512-FP16 Disp8(7f) vcvtuqq2ph xmm6{k7}{z}, QWORD PTR [edx-1024]{1to8} #AVX512-FP16 BROADCAST_EN Disp8(80) MASK_ENABLING ZEROCTL vcvtusi2sh xmm6, xmm5, edx #AVX512-FP16 - vcvtusi2sh xmm6, xmm5, {rn-sae}, edx #AVX512-FP16 HAS_SAE RC_CTRL + vcvtusi2sh xmm6, xmm5, edx, {rn-sae} #AVX512-FP16 HAS_SAE RC_CTRL vcvtusi2sh xmm6, xmm5, DWORD PTR [esp+esi*8+0x10000000] #AVX512-FP16 vcvtusi2sh xmm6, xmm5, DWORD PTR [ecx] #AVX512-FP16 vcvtusi2sh xmm6, xmm5, DWORD PTR [ecx+508] #AVX512-FP16 Disp8(7f) diff --git a/gas/testsuite/gas/i386/x86-64-avx512_fp16.s b/gas/testsuite/gas/i386/x86-64-avx512_fp16.s index f9120a2184d..171c49b1cbf 100644 --- a/gas/testsuite/gas/i386/x86-64-avx512_fp16.s +++ b/gas/testsuite/gas/i386/x86-64-avx512_fp16.s @@ -933,9 +933,9 @@ _start: vcvtsh2usi r12, WORD PTR [rcx+254] #AVX512-FP16 Disp8(7f) vcvtsh2usi r12, WORD PTR [rdx-256] #AVX512-FP16 Disp8(80) vcvtsi2sh xmm30, xmm29, r12 #AVX512-FP16 - vcvtsi2sh xmm30, xmm29, {rn-sae}, r12 #AVX512-FP16 HAS_SAE RC_CTRL + vcvtsi2sh xmm30, xmm29, r12, {rn-sae} #AVX512-FP16 HAS_SAE RC_CTRL vcvtsi2sh xmm30, xmm29, edx #AVX512-FP16 - vcvtsi2sh xmm30, xmm29, {rn-sae}, edx #AVX512-FP16 HAS_SAE RC_CTRL + vcvtsi2sh xmm30, xmm29, edx, {rn-sae} #AVX512-FP16 HAS_SAE RC_CTRL vcvtsi2sh xmm30, xmm29, DWORD PTR [rbp+r14*8+0x10000000] #AVX512-FP16 vcvtsi2sh xmm30, xmm29, DWORD PTR [r9] #AVX512-FP16 vcvtsi2sh xmm30, xmm29, DWORD PTR [rcx+508] #AVX512-FP16 Disp8(7f) @@ -1030,9 +1030,9 @@ _start: vcvtuqq2ph xmm30, ZMMWORD PTR [rcx+8128] #AVX512-FP16 Disp8(7f) vcvtuqq2ph xmm30{k7}{z}, QWORD PTR [rdx-1024]{1to8} #AVX512-FP16 BROADCAST_EN Disp8(80) MASK_ENABLING ZEROCTL vcvtusi2sh xmm30, xmm29, r12 #AVX512-FP16 - vcvtusi2sh xmm30, xmm29, {rn-sae}, r12 #AVX512-FP16 HAS_SAE RC_CTRL + vcvtusi2sh xmm30, xmm29, r12, {rn-sae} #AVX512-FP16 HAS_SAE RC_CTRL vcvtusi2sh xmm30, xmm29, edx #AVX512-FP16 - vcvtusi2sh xmm30, xmm29, {rn-sae}, edx #AVX512-FP16 HAS_SAE RC_CTRL + vcvtusi2sh xmm30, xmm29, edx, {rn-sae} #AVX512-FP16 HAS_SAE RC_CTRL vcvtusi2sh xmm30, xmm29, DWORD PTR [rbp+r14*8+0x10000000] #AVX512-FP16 vcvtusi2sh xmm30, xmm29, DWORD PTR [r9] #AVX512-FP16 vcvtusi2sh xmm30, xmm29, DWORD PTR [rcx+508] #AVX512-FP16 Disp8(7f)