From: Samuel Pitoiset Date: Fri, 5 Jan 2018 17:00:31 +0000 (+0100) Subject: radv: add has_scissor_bug for Vega10 and Raven X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=b09b3f88341b7cd31eb8b1921d8d2b29fd0bfaa3;p=mesa.git radv: add has_scissor_bug for Vega10 and Raven Signed-off-by: Samuel Pitoiset Reviewed-by: Bas Nieuwenhuizen --- diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index b0bddd16b39..665ee876a9d 100644 --- a/src/amd/vulkan/radv_cmd_buffer.c +++ b/src/amd/vulkan/radv_cmd_buffer.c @@ -1122,8 +1122,7 @@ radv_emit_scissor(struct radv_cmd_buffer *cmd_buffer) * scissor registers are changed. There is also a more efficient but * more involved alternative workaround. */ - if (cmd_buffer->device->physical_device->rad_info.family == CHIP_VEGA10 || - cmd_buffer->device->physical_device->rad_info.family == CHIP_RAVEN) { + if (cmd_buffer->device->physical_device->has_scissor_bug) { cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_PS_PARTIAL_FLUSH; si_emit_cache_flush(cmd_buffer); } diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c index 528d3539c91..4270e6a870b 100644 --- a/src/amd/vulkan/radv_device.c +++ b/src/amd/vulkan/radv_device.c @@ -265,6 +265,10 @@ radv_physical_device_init(struct radv_physical_device *device, device->cpdma_prefetch_writes_memory = device->rad_info.chip_class <= VI; + /* Vega10/Raven need a special workaround for a hardware bug. */ + device->has_scissor_bug = device->rad_info.family == CHIP_VEGA10 || + device->rad_info.family == CHIP_RAVEN; + radv_physical_device_init_mem_types(device); result = radv_init_wsi(device); diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h index f691c832bc2..2d7d9591872 100644 --- a/src/amd/vulkan/radv_private.h +++ b/src/amd/vulkan/radv_private.h @@ -273,6 +273,7 @@ struct radv_physical_device { bool rbplus_allowed; /* if RB+ is allowed */ bool has_clear_state; bool cpdma_prefetch_writes_memory; + bool has_scissor_bug; /* This is the drivers on-disk cache used as a fallback as opposed to * the pipeline cache defined by apps.