From: Uros Bizjak Date: Thu, 24 May 2018 21:23:33 +0000 (+0200) Subject: sse.md (cvtusi264): Add {q} suffix to insn mnemonic. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=b0eb19e71448cdfd9c9e652ec03f02fea99a7590;p=gcc.git sse.md (cvtusi264): Add {q} suffix to insn mnemonic. * config/i386/sse.md (cvtusi264): Add {q} suffix to insn mnemonic. testsuite/Changelog: * gcc.target/i386/avx512f-vcvtusi2sd64-1.c: Update scan string. * gcc.target/i386/avx512f-vcvtusi2ss64-1.c: Ditto. From-SVN: r260691 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index c793380384a..0bba637a95a 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2018-05-24 Uros Bizjak + + * config/i386/sse.md (cvtusi264): + Add {q} suffix to insn mnemonic. + 2018-05-23 Jozef Lawrynowicz * config/msp430/msp430.c (TARGET_WARN_FUNC_RETURN): Define. diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 9750708a80f..afe18d61973 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -4460,7 +4460,7 @@ (match_operand:VF_128 1 "register_operand" "v") (const_int 1)))] "TARGET_AVX512F && TARGET_64BIT" - "vcvtusi2\t{%2, %1, %0|%0, %1, %2}" + "vcvtusi2{q}\t{%2, %1, %0|%0, %1, %2}" [(set_attr "type" "sseicvt") (set_attr "prefix" "evex") (set_attr "mode" "")]) diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index f7d0c3a4fb4..4e77177e229 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2018-05-24 Uros Bizjak + + * gcc.target/i386/avx512f-vcvtusi2sd64-1.c: Update scan string. + * gcc.target/i386/avx512f-vcvtusi2ss64-1.c: Ditto. + 2018-05-24 Roger Sayle * gcc.dg/fold-popcount-1.c: New testcase. diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvtusi2sd64-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvtusi2sd64-1.c index 8675450f0c4..66476c3013f 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vcvtusi2sd64-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvtusi2sd64-1.c @@ -1,7 +1,7 @@ /* { dg-do compile { target { ! ia32 } } } */ /* { dg-options "-mavx512f -O2" } */ -/* { dg-final { scan-assembler-times "vcvtusi2sd\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtusi2sd\[ \\t\]+\[^%\n\]*%r\[^\{\n\]*\{ru-sae\}\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtusi2sdq\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtusi2sdq\[ \\t\]+\[^%\n\]*%r\[^\{\n\]*\{ru-sae\}\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ #include diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvtusi2ss64-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvtusi2ss64-1.c index 38ecf39ad65..f4dae536873 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vcvtusi2ss64-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvtusi2ss64-1.c @@ -1,7 +1,7 @@ /* { dg-do compile { target { ! ia32 } } } */ /* { dg-options "-mavx512f -O2" } */ -/* { dg-final { scan-assembler-times "vcvtusi2ss\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtusi2ss\[ \\t\]+\[^%\n\]*%r\[^\{\n\]*\{rz-sae\}\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtusi2ssq\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtusi2ssq\[ \\t\]+\[^%\n\]*%r\[^\{\n\]*\{rz-sae\}\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ #include