From: Daniel Benusovich Date: Sun, 10 Mar 2019 22:29:23 +0000 (-0700) Subject: Add multiple match test X-Git-Tag: div_pipeline~2315 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=b0fbc49db0292cb1210c2c9ed8f215fdeebe2190;p=soc.git Add multiple match test --- diff --git a/TLB/test/test_cam.py b/TLB/test/test_cam.py index f7da12b1..cbb06c10 100644 --- a/TLB/test/test_cam.py +++ b/TLB/test/test_cam.py @@ -140,6 +140,41 @@ def testbench(dut): yield from set_cam(dut, enable, write_enable, address, data) yield yield from check_single_match(dut, single_match, 0) + + # Multiple Match test + # Write Entry 1 + enable = 1 + write_enable = 1 + address = 1 + data = 5 + multiple_match = 0 + single_match = 0 + yield from set_cam(dut, enable, write_enable, address, data) + yield + yield from check_single_match(dut, single_match, 0) + + # Write Entry 2 + # Same data as Entry 1 + enable = 1 + write_enable = 1 + address = 2 + data = 5 + multiple_match = 0 + single_match = 0 + yield from set_cam(dut, enable, write_enable, address, data) + yield + yield from check_single_match(dut, single_match, 0) + + # Read Data 5 + enable = 1 + write_enable = 0 + address = 1 + data = 5 + multiple_match = 1 + single_match = 0 + yield from set_cam(dut, enable, write_enable, address, data) + yield + yield from check_all(dut, multiple_match, single_match, address,0,0,0) yield