From: Gabe Black <gblack@eecs.umich.edu>
Date: Thu, 12 Jun 2008 04:54:05 +0000 (-0400)
Subject: X86: Make the apic isr and irr work.
X-Git-Tag: m5_2.0_beta6~143
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=b10742ee2b01213999ba9a3706093f5946097341;p=gem5.git

X86: Make the apic isr and irr work.
---

diff --git a/src/arch/x86/miscregfile.cc b/src/arch/x86/miscregfile.cc
index ee71842d2..1e02391e6 100644
--- a/src/arch/x86/miscregfile.cc
+++ b/src/arch/x86/miscregfile.cc
@@ -127,19 +127,10 @@ MiscReg MiscRegFile::readRegNoEffect(int miscReg)
 MiscReg MiscRegFile::readReg(int miscReg, ThreadContext * tc)
 {
     if (miscReg >= MISCREG_APIC_START && miscReg <= MISCREG_APIC_END) {
-        if (miscReg >= MISCREG_APIC_IN_SERVICE(0) &&
-                miscReg <= MISCREG_APIC_IN_SERVICE(15)) {
-            panic("Local APIC In-Service registers are unimplemented.\n");
-        }
         if (miscReg >= MISCREG_APIC_TRIGGER_MODE(0) &&
                 miscReg <= MISCREG_APIC_TRIGGER_MODE(15)) {
             panic("Local APIC Trigger Mode registers are unimplemented.\n");
         }
-        if (miscReg >= MISCREG_APIC_INTERRUPT_REQUEST(0) &&
-                miscReg <= MISCREG_APIC_INTERRUPT_REQUEST(15)) {
-            panic("Local APIC Interrupt Request registers "
-                    "are unimplemented.\n");
-        }
         switch (miscReg) {
           case MISCREG_APIC_ARBITRATION_PRIORITY:
             panic("Local APIC Arbitration Priority register unimplemented.\n");