From: Kyrylo Tkachov Date: Thu, 9 Jun 2016 08:45:22 +0000 (+0000) Subject: [AArch64] Model CSEL instruction in Cortex-A57 scheduling model X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=b111f1f9f064d09ad9be18f673e899c275bd7d8d;p=gcc.git [AArch64] Model CSEL instruction in Cortex-A57 scheduling model * config/arm/cortex-a57.md (cortex_a57_alu): Handle csel type. From-SVN: r237249 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 89c9f766cce..da572a41a7d 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2016-06-09 Kyrylo Tkachov + + * config/arm/cortex-a57.md (cortex_a57_alu): + Handle csel type. + 2016-06-08 Martin Sebor Jakub Jelinek diff --git a/gcc/config/arm/cortex-a57.md b/gcc/config/arm/cortex-a57.md index 37912db4643..c8cf80f4ba7 100644 --- a/gcc/config/arm/cortex-a57.md +++ b/gcc/config/arm/cortex-a57.md @@ -297,7 +297,7 @@ (eq_attr "type" "alu_imm,alus_imm,logic_imm,logics_imm,\ alu_sreg,alus_sreg,logic_reg,logics_reg,\ adc_imm,adcs_imm,adc_reg,adcs_reg,\ - adr,bfm,clz,rbit,rev,alu_dsp_reg,\ + adr,bfm,clz,csel,rbit,rev,alu_dsp_reg,\ rotate_imm,shift_imm,shift_reg,\ mov_imm,mov_reg,\ mvn_imm,mvn_reg,\