From: Andreas Krebbel Date: Tue, 2 Apr 2019 11:03:40 +0000 (+0000) Subject: S/390: arch13: vector load/store byte reversed element for builtins X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=b112d1c928df130cd5481e0f751242c7217ec83d;p=gcc.git S/390: arch13: vector load/store byte reversed element for builtins 2019-04-02 Andreas Krebbel * config/s390/vecintrin.h: Map vec_vster low-level builtins to vec_vler. * config/s390/vx-builtins.md ("*vec_insert_and_zero_bswap") ("*vec_set_bswap_elem", "*vec_set_bswap_vec") ("*vec_extract_bswap_vec", "*vec_extract_bswap_elem"): New insn definitions. gcc/testsuite/ChangeLog: 2019-04-02 Andreas Krebbel * gcc.target/s390/zvector/bswap-and-replicate-1.c: New test. * gcc.target/s390/zvector/get-element-bswap-1.c: New test. * gcc.target/s390/zvector/get-element-bswap-2.c: New test. * gcc.target/s390/zvector/get-element-bswap-3.c: New test. * gcc.target/s390/zvector/get-element-bswap-4.c: New test. * gcc.target/s390/zvector/set-element-bswap-1.c: New test. * gcc.target/s390/zvector/set-element-bswap-2.c: New test. * gcc.target/s390/zvector/set-element-bswap-3.c: New test. From-SVN: r270086 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 9cb3b9843d3..782aed6f33c 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,11 @@ +2019-04-02 Andreas Krebbel + + * config/s390/vecintrin.h: Map vec_vster low-level builtins to vec_vler. + * config/s390/vx-builtins.md ("*vec_insert_and_zero_bswap") + ("*vec_set_bswap_elem", "*vec_set_bswap_vec") + ("*vec_extract_bswap_vec", "*vec_extract_bswap_elem"): + New insn definitions. + 2019-04-02 Andreas Krebbel * config/s390/s390-builtin-types.def: Add new builtin function type. diff --git a/gcc/config/s390/vecintrin.h b/gcc/config/s390/vecintrin.h index 1220bf6c41e..05707a136c1 100644 --- a/gcc/config/s390/vecintrin.h +++ b/gcc/config/s390/vecintrin.h @@ -159,6 +159,20 @@ __lcbb(const void *ptr, int bndry) | __VEC_CLASS_FP_SUBNORMAL_N, &cc); \ cc != 3 ? 1 : 0; \ }) + +#define vec_vstbrh vec_vlbrh +#define vec_vstbrf vec_vlbrf +#define vec_vstbrg vec_vlbrg +#define vec_vstbrq vec_vlbrq +#define vec_vstbrf_flt vec_vlbrf_flt +#define vec_vstbrg_dbl vec_vlbrg_dbl + +#define vec_vsterb vec_vlerb +#define vec_vsterh vec_vlerh +#define vec_vsterf vec_vlerh +#define vec_vsterg vec_vlerh +#define vec_vsterf_flt vec_vlerf_flt +#define vec_vsterg_dbl vec_vlerg_dbl #define vec_gather_element __builtin_s390_vec_gather_element #define vec_xl __builtin_s390_vec_xl #define vec_xld2 __builtin_s390_vec_xld2 diff --git a/gcc/config/s390/vx-builtins.md b/gcc/config/s390/vx-builtins.md index 55b49f456df..8d837c4cead 100644 --- a/gcc/config/s390/vx-builtins.md +++ b/gcc/config/s390/vx-builtins.md @@ -181,6 +181,18 @@ "vllez\t%v0,%1" [(set_attr "op_type" "VRX")]) +; vec_revb (vec_insert_and_zero(x)) bswap-and-replicate-1.c +; vllebrzh, vllebrzf, vllebrzg +(define_insn "*vec_insert_and_zero_bswap" + [(set (match_operand:V_HW_HSD 0 "register_operand" "=v") + (bswap:V_HW_HSD (unspec:V_HW_HSD + [(match_operand: 1 "memory_operand" "R")] + UNSPEC_VEC_INSERT_AND_ZERO)))] + "TARGET_VXE2" + "vllebrz\t%v0,%1" + [(set_attr "op_type" "VRX")]) + + (define_insn "vlbb" [(set (match_operand:V16QI 0 "register_operand" "=v") (unspec:V16QI [(match_operand:BLK 1 "memory_operand" "R") @@ -2139,3 +2151,54 @@ constv = force_const_mem (V16QImode, gen_rtx_CONST_VECTOR (V16QImode, gen_rtvec_v (16, perm_rtx))); emit_move_insn (operands[2], constv); }) + +; vec_insert (__builtin_bswap32 (*a), b, 1) set-element-bswap-2.c +; b[1] = __builtin_bswap32 (*a) set-element-bswap-3.c +; vlebrh, vlebrf, vlebrg +(define_insn "*vec_set_bswap_elem" + [(set (match_operand:V_HW_HSD 0 "register_operand" "=v") + (unspec:V_HW_HSD [(bswap: (match_operand: 1 "memory_operand" "R")) + (match_operand:SI 2 "const_int_operand" "C") + (match_operand:V_HW_HSD 3 "register_operand" "0")] + UNSPEC_VEC_SET))] + "TARGET_VXE2 && UINTVAL (operands[2]) < GET_MODE_NUNITS (mode)" + "vlebr\t%v0,%1,%2" + [(set_attr "op_type" "VRX")]) + +; vec_revb (vec_insert (*a, vec_revb (b), 1)) set-element-bswap-1.c +; vlebrh, vlebrf, vlebrg +(define_insn "*vec_set_bswap_vec" + [(set (match_operand:V_HW_HSD 0 "register_operand" "=v") + (bswap:V_HW_HSD + (unspec:V_HW_HSD [(match_operand: 1 "memory_operand" "R") + (match_operand:SI 2 "const_int_operand" "C") + (bswap:V_HW_HSD (match_operand:V_HW_HSD 3 "register_operand" "0"))] + UNSPEC_VEC_SET)))] + "TARGET_VXE2 && UINTVAL (operands[2]) < GET_MODE_NUNITS (mode)" + "vlebr\t%v0,%1,%2" + [(set_attr "op_type" "VRX")]) + +; *a = vec_extract (vec_revb (b), 1); get-element-bswap-3.c +; *a = vec_revb (b)[1]; get-element-bswap-4.c +; vstebrh, vstebrf, vstebrg +(define_insn "*vec_extract_bswap_vec" + [(set (match_operand: 0 "memory_operand" "=R") + (unspec: [(bswap:V_HW_HSD (match_operand:V_HW_HSD 1 "register_operand" "v")) + (match_operand:SI 2 "const_int_operand" "C")] + UNSPEC_VEC_EXTRACT))] + "TARGET_VXE2 && UINTVAL (operands[2]) < GET_MODE_NUNITS (mode)" + "vstebr\t%v1,%0,%2" + [(set_attr "op_type" "VRX")]) + +; *a = __builtin_bswap32 (vec_extract (b, 1)); get-element-bswap-1.c +; *a = __builtin_bswap32 (b[1]); get-element-bswap-2.c +; vstebrh, vstebrf, vstebrg +(define_insn "*vec_extract_bswap_elem" + [(set (match_operand: 0 "memory_operand" "=R") + (bswap: + (unspec: [(match_operand:V_HW_HSD 1 "register_operand" "v") + (match_operand:SI 2 "const_int_operand" "C")] + UNSPEC_VEC_EXTRACT)))] + "TARGET_VXE2 && UINTVAL (operands[2]) < GET_MODE_NUNITS (mode)" + "vstebr\t%v1,%0,%2" + [(set_attr "op_type" "VRX")]) diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 22eecb25aca..9315bd02214 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,14 @@ +2019-04-02 Andreas Krebbel + + * gcc.target/s390/zvector/bswap-and-replicate-1.c: New test. + * gcc.target/s390/zvector/get-element-bswap-1.c: New test. + * gcc.target/s390/zvector/get-element-bswap-2.c: New test. + * gcc.target/s390/zvector/get-element-bswap-3.c: New test. + * gcc.target/s390/zvector/get-element-bswap-4.c: New test. + * gcc.target/s390/zvector/set-element-bswap-1.c: New test. + * gcc.target/s390/zvector/set-element-bswap-2.c: New test. + * gcc.target/s390/zvector/set-element-bswap-3.c: New test. + 2019-04-02 Andreas Krebbel * gcc.target/s390/zvector/vec-reve-load-byte-z14.c: New test. diff --git a/gcc/testsuite/gcc.target/s390/zvector/bswap-and-replicate-1.c b/gcc/testsuite/gcc.target/s390/zvector/bswap-and-replicate-1.c new file mode 100644 index 00000000000..443b346ce90 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/zvector/bswap-and-replicate-1.c @@ -0,0 +1,28 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -mzarch -march=arch13 -mzvector -fno-asynchronous-unwind-tables -dp" } */ + +#include + +vector signed short +vllebrzh (const signed short *a) +{ + return vec_revb (vec_insert_and_zero (a)); +} + +/* { dg-final { scan-assembler-times "vllebrzh.*\n\tvllebrzh.*vec_insert_and_zero_bswapv8hi" 1 } } */ + +vector signed int +vllebrzf (const signed int *a) +{ + return vec_revb (vec_insert_and_zero (a)); +} + +/* { dg-final { scan-assembler-times "vllebrzf.*\n\tvllebrzf.*vec_insert_and_zero_bswapv4si" 1 } } */ + +vector signed long long +vllebrzg (const signed long long *a) +{ + return vec_revb (vec_insert_and_zero (a)); +} + +/* { dg-final { scan-assembler-times "vllebrzg.*\n\tvllebrzg.*vec_insert_and_zero_bswapv2di" 1 } } */ diff --git a/gcc/testsuite/gcc.target/s390/zvector/get-element-bswap-1.c b/gcc/testsuite/gcc.target/s390/zvector/get-element-bswap-1.c new file mode 100644 index 00000000000..ce81f106029 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/zvector/get-element-bswap-1.c @@ -0,0 +1,28 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -mzarch -march=arch13 -mzvector -fno-asynchronous-unwind-tables -dp" } */ + +#include + +void +vstebrh (signed short *a, vector signed short b) +{ + *a = __builtin_bswap16 (vec_extract (b, 1)); +} + +/* { dg-final { scan-assembler-times "vstebrh.*\n\tvstebrh.*vec_extract_bswap_elemv8hi" 1 } } */ + +void +vstebrf (int *a, vector int b) +{ + *a = __builtin_bswap32 (vec_extract (b, 1)); +} + +/* { dg-final { scan-assembler-times "vstebrf.*\n\tvstebrf.*vec_extract_bswap_elemv4si" 1 } } */ + +void +vstebrg (long long *a, vector long long b) +{ + *a = __builtin_bswap64 (vec_extract (b, 1)); +} + +/* { dg-final { scan-assembler-times "vstebrg.*\n\tvstebrg.*vec_extract_bswap_elemv2di" 1 } } */ diff --git a/gcc/testsuite/gcc.target/s390/zvector/get-element-bswap-2.c b/gcc/testsuite/gcc.target/s390/zvector/get-element-bswap-2.c new file mode 100644 index 00000000000..e8190b0b2cb --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/zvector/get-element-bswap-2.c @@ -0,0 +1,28 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -mzarch -march=arch13 -mzvector -fno-asynchronous-unwind-tables -dp" } */ + +#include + +void +vstebrh (signed short *a, vector signed short b) +{ + *a = __builtin_bswap16 (b[1]); +} + +/* { dg-final { scan-assembler-times "vstebrh.*\n\tvstebrh.*vec_extract_bswap_elemv8hi" 1 } } */ + +void +vstebrf (int *a, vector int b) +{ + *a = __builtin_bswap32 (b[1]); +} + +/* { dg-final { scan-assembler-times "vstebrf.*\n\tvstebrf.*vec_extract_bswap_elemv4si" 1 } } */ + +void +vstebrg (long long *a, vector long long b) +{ + *a = __builtin_bswap64 (b[1]); +} + +/* { dg-final { scan-assembler-times "vstebrg.*\n\tvstebrg.*vec_extract_bswap_elemv2di" 1 } } */ diff --git a/gcc/testsuite/gcc.target/s390/zvector/get-element-bswap-3.c b/gcc/testsuite/gcc.target/s390/zvector/get-element-bswap-3.c new file mode 100644 index 00000000000..c4f0287b0f1 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/zvector/get-element-bswap-3.c @@ -0,0 +1,28 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -mzarch -march=arch13 -mzvector -fno-asynchronous-unwind-tables -dp" } */ + +#include + +void +vstebrh (signed short *a, vector signed short b) +{ + *a = vec_extract (vec_revb (b), 1); +} + +/* { dg-final { scan-assembler-times "vstebrh.*\n\tvstebrh.*vec_extract_bswap_vecv8hi" 1 } } */ + +void +vstebrf (int *a, vector int b) +{ + *a = vec_extract (vec_revb (b), 1); +} + +/* { dg-final { scan-assembler-times "vstebrf.*\n\tvstebrf.*vec_extract_bswap_vecv4si" 1 } } */ + +void +vstebrg (long long *a, vector long long b) +{ + *a = vec_extract (vec_revb (b), 1); +} + +/* { dg-final { scan-assembler-times "vstebrg.*\n\tvstebrg.*vec_extract_bswap_vecv2di" 1 } } */ diff --git a/gcc/testsuite/gcc.target/s390/zvector/get-element-bswap-4.c b/gcc/testsuite/gcc.target/s390/zvector/get-element-bswap-4.c new file mode 100644 index 00000000000..1be463f297d --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/zvector/get-element-bswap-4.c @@ -0,0 +1,28 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -mzarch -march=arch13 -mzvector -fno-asynchronous-unwind-tables -dp" } */ + +#include + +void +vstebrh (signed short *a, vector signed short b) +{ + *a = vec_revb (b)[1]; +} + +/* { dg-final { scan-assembler-times "vstebrh.*\n\tvstebrh.*vec_extract_bswap_vecv8hi" 1 } } */ + +void +vstebrf (int *a, vector int b) +{ + *a = vec_revb (b)[1]; +} + +/* { dg-final { scan-assembler-times "vstebrf.*\n\tvstebrf.*vec_extract_bswap_vecv4si" 1 } } */ + +void +vstebrg (long long *a, vector long long b) +{ + *a = vec_revb (b)[1]; +} + +/* { dg-final { scan-assembler-times "vstebrg.*\n\tvstebrg.*vec_extract_bswap_vecv2di" 1 } } */ diff --git a/gcc/testsuite/gcc.target/s390/zvector/set-element-bswap-1.c b/gcc/testsuite/gcc.target/s390/zvector/set-element-bswap-1.c new file mode 100644 index 00000000000..218f829bf6e --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/zvector/set-element-bswap-1.c @@ -0,0 +1,28 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -mzarch -march=arch13 -mzvector -fno-asynchronous-unwind-tables -dp" } */ + +#include + +vector signed short +vlebrh (const signed short *a, vector signed short b) +{ + return vec_revb (vec_insert (*a, vec_revb (b), 1)); +} + +/* { dg-final { scan-assembler-times "vlebrh.*\n\tvlebrh.*vec_set_bswap_vecv8hi" 1 } } */ + +vector signed int +vlebrf (const signed int *a, vector signed int b) +{ + return vec_revb (vec_insert (*a, vec_revb (b), 1)); +} + +/* { dg-final { scan-assembler-times "vlebrf.*\n\tvlebrf.*vec_set_bswap_vecv4si" 1 } } */ + +vector signed long long +vlebrg (const signed long long *a, vector signed long long b) +{ + return vec_revb (vec_insert (*a, vec_revb (b), 1)); +} + +/* { dg-final { scan-assembler-times "vlebrg.*\n\tvlebrg.*vec_set_bswap_vecv2di" 1 } } */ diff --git a/gcc/testsuite/gcc.target/s390/zvector/set-element-bswap-2.c b/gcc/testsuite/gcc.target/s390/zvector/set-element-bswap-2.c new file mode 100644 index 00000000000..8a8c95b6936 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/zvector/set-element-bswap-2.c @@ -0,0 +1,28 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -mzarch -march=arch13 -mzvector -fno-asynchronous-unwind-tables -dp" } */ + +#include + +vector signed short +vlebrh (const signed short *a, vector signed short b) +{ + return vec_insert (__builtin_bswap16 (*a), b, 1); +} + +/* { dg-final { scan-assembler-times "vlebrh.*\n\tvlebrh.*vec_set_bswap_elemv8hi" 1 } } */ + +vector signed int +vlebrf (const signed int *a, vector signed int b) +{ + return vec_insert (__builtin_bswap32 (*a), b, 1); +} + +/* { dg-final { scan-assembler-times "vlebrf.*\n\tvlebrf.*vec_set_bswap_elemv4si" 1 } } */ + +vector signed long long +vlebrg (const signed long long *a, vector signed long long b) +{ + return vec_insert (__builtin_bswap64 (*a), b, 1); +} + +/* { dg-final { scan-assembler-times "vlebrg.*\n\tvlebrg.*vec_set_bswap_elemv2di" 1 } } */ diff --git a/gcc/testsuite/gcc.target/s390/zvector/set-element-bswap-3.c b/gcc/testsuite/gcc.target/s390/zvector/set-element-bswap-3.c new file mode 100644 index 00000000000..ef8742602d4 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/zvector/set-element-bswap-3.c @@ -0,0 +1,31 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -mzarch -march=arch13 -mzvector -fno-asynchronous-unwind-tables -dp" } */ + +#include + +vector signed short +vlebrh (const signed short *a, vector signed short b) +{ + b[1] = __builtin_bswap16 (*a); + return b; +} + +/* { dg-final { scan-assembler-times "vlebrh.*\n\tvlebrh.*vec_set_bswap_elemv8hi" 1 } } */ + +vector signed int +vlebrf (const signed int *a, vector signed int b) +{ + b[1] = __builtin_bswap32 (*a); + return b; +} + +/* { dg-final { scan-assembler-times "vlebrf.*\n\tvlebrf.*vec_set_bswap_elemv4si" 1 } } */ + +vector signed long long +vlebrg (const signed long long *a, vector signed long long b) +{ + b[1] = __builtin_bswap64 (*a); + return b; +} + +/* { dg-final { scan-assembler-times "vlebrg.*\n\tvlebrg.*vec_set_bswap_elemv2di" 1 } } */