From: Gerald Pfeifer Date: Sun, 5 Feb 2017 11:09:18 +0000 (+0000) Subject: extend.texi (x86 specific memory model extensions for transactional memory): Simplify... X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=b11f6c195cebccaaf973480512fb38281cb2a613;p=gcc.git extend.texi (x86 specific memory model extensions for transactional memory): Simplify a phrase. * doc/extend.texi (x86 specific memory model extensions for transactional memory): Simplify a phrase. From-SVN: r245189 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 9e751381511..e0d251dbcdc 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2017-02-05 Gerald Pfeifer + + * doc/extend.texi (x86 specific memory model extensions for + transactional memory): Simplify a phrase. + 2017-02-05 Eric Botcazou PR target/79353 diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi index 20eba822d54..24e50538736 100644 --- a/gcc/doc/extend.texi +++ b/gcc/doc/extend.texi @@ -10103,7 +10103,7 @@ after addition, conditional jump on carry etc. @section x86-Specific Memory Model Extensions for Transactional Memory The x86 architecture supports additional memory ordering flags -to mark lock critical sections for hardware lock elision. +to mark critical sections for hardware lock elision. These must be specified in addition to an existing memory order to atomic intrinsics.