From: Sebastien Bourdeauducq Date: Mon, 30 Mar 2015 11:41:04 +0000 (+0800) Subject: Revert "migen/fhdl/specials: use fdict to pass memory initialization files to Verilog... X-Git-Tag: 24jan2021_ls180~2099^2~139 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=b1c811a3d192deae7c1b14e1403cd40f0bd1f4ef;p=litex.git Revert "migen/fhdl/specials: use fdict to pass memory initialization files to VerilogConvert and print them in __str__ method" This reverts commit 95cfc444e60ea18fa0efef229582923b2e695631. --- diff --git a/migen/fhdl/specials.py b/migen/fhdl/specials.py index 361f51a1..f65beb7a 100644 --- a/migen/fhdl/specials.py +++ b/migen/fhdl/specials.py @@ -6,15 +6,6 @@ from migen.fhdl.tools import * from migen.fhdl.tracer import get_obj_var_name from migen.fhdl.verilog import _printexpr as verilog_printexpr -def _new_file(fdict, requested_filename, contents): - filename = requested_filename - i = 1 - while filename in fdict.keys(): - filename = requested_filename + str(i) - i += 1 - fdict[filename] = contents - return filename, fdict - class Special(HUID): def iter_expressions(self): for x in []: @@ -316,7 +307,15 @@ class Memory(Special): r += "\n" if memory.init is not None: - memory_filename, fdict = _new_file(fdict, gn(memory) + ".init", memory.init) + memory_filename = gn(memory) + ".init" + + # XXX move I/O to mibuild? + # (Implies mem init won't work with simple Migen examples?) + f = open(memory_filename, "w") + for d in memory.init: + f.write("{:x}\n".format(d)) + f.close() + r += "initial begin\n" r += "$readmemh(\"" + memory_filename + "\", " + gn(memory) + ");\n" r += "end\n\n" diff --git a/migen/fhdl/verilog.py b/migen/fhdl/verilog.py index f75dd9fb..499c74e3 100644 --- a/migen/fhdl/verilog.py +++ b/migen/fhdl/verilog.py @@ -315,11 +315,6 @@ class VerilogConvert: fdict = OrderedDict() src, fdict = _printspecials(self.special_overrides, self.f.specials - self.lowered_specials, self.ns, fdict) r += src - for filename, contents in fdict.items(): - f = open(filename, "w") - for data in contents: - f.write("{:x}\n".format(data)) - f.close() r += "endmodule\n" return r