From: Miodrag Milanovic Date: Sun, 30 Aug 2020 10:25:23 +0000 (+0200) Subject: Fix import of VHDL enums X-Git-Tag: working-ls180~288^2~2 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=b1e3bc059c61589551bc1a9204b517adfe9ea9ce;p=yosys.git Fix import of VHDL enums --- diff --git a/frontends/verific/verific.cc b/frontends/verific/verific.cc index 52047ae2b..0bac2b57c 100644 --- a/frontends/verific/verific.cc +++ b/frontends/verific/verific.cc @@ -199,12 +199,19 @@ void VerificImporter::import_attributes(dict &att attributes.emplace(stringf("\\enum_value_%s", p+2), RTLIL::escape_id(k)); } else if (nl->IsFromVhdl()) { - // Expect "" + // Expect "" or plain auto p = v; if (p) { - if (*p != '"') - p = nullptr; - else { + if (*p != '"') { + auto *q = p; + for (; *q != '\0'; q++) + if (*q != '0' && *q != '1') { + p = nullptr; + break; + } + if (p != nullptr) + attributes.emplace(stringf("\\enum_value_%s", p), RTLIL::escape_id(k)); + } else { auto *q = p+1; for (; *q != '"'; q++) if (*q != '0' && *q != '1') { @@ -213,16 +220,20 @@ void VerificImporter::import_attributes(dict &att } if (p && *(q+1) != '\0') p = nullptr; + + if (p != nullptr) + { + auto l = strlen(p); + auto q = (char*)malloc(l+1-2); + strncpy(q, p+1, l-2); + q[l-2] = '\0'; + attributes.emplace(stringf("\\enum_value_%s", q), RTLIL::escape_id(k)); + free(q); + } } } if (p == nullptr) - log_error("Expected TypeRange value '%s' to be of form \"\".\n", v); - auto l = strlen(p); - auto q = (char*)malloc(l+1-2); - strncpy(q, p+1, l-2); - q[l-2] = '\0'; - attributes.emplace(stringf("\\enum_value_%s", q), RTLIL::escape_id(k)); - free(q); + log_error("Expected TypeRange value '%s' to be of form \"\" or .\n", v); } } }