From: Jürgen Urban Date: Sun, 16 Jun 2013 09:16:23 +0000 (+0000) Subject: mips.h (ISA_HAS_LL_SC): Exclude TARGET_MIPS5900. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=b259d352ca69bed852c775145cdcd5d48bb45d1e;p=gcc.git mips.h (ISA_HAS_LL_SC): Exclude TARGET_MIPS5900. gcc/ 2013-06-16 Jürgen Urban * config/mips/mips.h (ISA_HAS_LL_SC): Exclude TARGET_MIPS5900. * config/mips/mips.c (mips_start_ll_sc_sync_block): Output ".set mips3" for 64-bit targets. From-SVN: r200132 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index d4a35462384..3b3044f2189 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2013-06-16 Jürgen Urban + + * config/mips/mips.h (ISA_HAS_LL_SC): Exclude TARGET_MIPS5900. + * config/mips/mips.c (mips_start_ll_sc_sync_block): Output + ".set mips3" for 64-bit targets. + 2013-06-15 Dehao Chen * tree-flow.h (gimple_check_call_matching_types): Add new argument. diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c index ff316449812..bd1d10b0e4e 100644 --- a/gcc/config/mips/mips.c +++ b/gcc/config/mips/mips.c @@ -12463,7 +12463,10 @@ mips_start_ll_sc_sync_block (void) if (!ISA_HAS_LL_SC) { output_asm_insn (".set\tpush", 0); - output_asm_insn (".set\tmips2", 0); + if (TARGET_64BIT) + output_asm_insn (".set\tmips3", 0); + else + output_asm_insn (".set\tmips2", 0); } } diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h index 48a8b42f5bc..479bdd4531c 100644 --- a/gcc/config/mips/mips.h +++ b/gcc/config/mips/mips.h @@ -1063,7 +1063,7 @@ struct mips_cpu_info { /* ISA includes ll and sc. Note that this implies ISA_HAS_SYNC because the expanders use both ISA_HAS_SYNC and ISA_HAS_LL_SC instructions. */ -#define ISA_HAS_LL_SC (mips_isa >= 2 && !TARGET_MIPS16) +#define ISA_HAS_LL_SC (mips_isa >= 2 && !TARGET_MIPS5900 && !TARGET_MIPS16) #define GENERATE_LL_SC \ (target_flags_explicit & MASK_LLSC \ ? TARGET_LLSC && !TARGET_MIPS16 \