From: Timothy Arceri Date: Thu, 23 Jun 2016 04:26:16 +0000 (+1000) Subject: i965/vec4: support packing tcs inputs X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=b25e49a3c7651d31b3e526577ae394ba0ae66de2;p=mesa.git i965/vec4: support packing tcs inputs Reviewed-by: Kenneth Graunke Reviewed-by: Edward O'Callaghan --- diff --git a/src/mesa/drivers/dri/i965/brw_vec4_tcs.cpp b/src/mesa/drivers/dri/i965/brw_vec4_tcs.cpp index f61c612b3a7..8bd150ad1b4 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4_tcs.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4_tcs.cpp @@ -166,6 +166,7 @@ void vec4_tcs_visitor::emit_input_urb_read(const dst_reg &dst, const src_reg &vertex_index, unsigned base_offset, + unsigned first_component, const src_reg &indirect_offset) { vec4_instruction *inst; @@ -191,7 +192,9 @@ vec4_tcs_visitor::emit_input_urb_read(const dst_reg &dst, if (inst->offset == 0 && indirect_offset.file == BAD_FILE) { emit(MOV(dst, swizzle(src_reg(temp), BRW_SWIZZLE_WWWW))); } else { - emit(MOV(dst, src_reg(temp))); + src_reg src = src_reg(temp); + src.swizzle = BRW_SWZ_COMP_INPUT(first_component); + emit(MOV(dst, src)); } } @@ -267,7 +270,8 @@ vec4_tcs_visitor::nir_emit_intrinsic(nir_intrinsic_instr *instr) dst_reg dst = get_nir_dest(instr->dest, BRW_REGISTER_TYPE_D); dst.writemask = brw_writemask_for_size(instr->num_components); - emit_input_urb_read(dst, vertex_index, imm_offset, indirect_offset); + emit_input_urb_read(dst, vertex_index, imm_offset, + nir_intrinsic_component(instr), indirect_offset); break; } case nir_intrinsic_load_input: diff --git a/src/mesa/drivers/dri/i965/brw_vec4_tcs.h b/src/mesa/drivers/dri/i965/brw_vec4_tcs.h index 329cd7dfc25..d408e56554e 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4_tcs.h +++ b/src/mesa/drivers/dri/i965/brw_vec4_tcs.h @@ -60,6 +60,7 @@ protected: void emit_input_urb_read(const dst_reg &dst, const src_reg &vertex_index, unsigned base_offset, + unsigned first_component, const src_reg &indirect_offset); void emit_output_urb_read(const dst_reg &dst, unsigned base_offset,