From: Luke Kenneth Casson Leighton Date: Tue, 12 May 2020 03:29:27 +0000 (+0100) Subject: Re: [libre-riscv-dev] Power memory fences and icache handling X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=b29e428415e530267bdd76c0e2e757aac8ad4237;p=libre-riscv-dev.git Re: [libre-riscv-dev] Power memory fences and icache handling --- diff --git a/1f/bbfed3ce82ed6ddbf61b68fcbfc9512f122c6d b/1f/bbfed3ce82ed6ddbf61b68fcbfc9512f122c6d new file mode 100644 index 0000000..57f9079 --- /dev/null +++ b/1f/bbfed3ce82ed6ddbf61b68fcbfc9512f122c6d @@ -0,0 +1,105 @@ +Return-path: +Envelope-to: publicinbox@libre-riscv.org +Delivery-date: Tue, 12 May 2020 04:29:52 +0100 +Received: from localhost ([::1] helo=libre-riscv.org) + by libre-soc.org with esmtp (Exim 4.89) + (envelope-from ) + id 1jYLc7-0004GD-Mw; Tue, 12 May 2020 04:29:51 +0100 +Received: from lkcl.net ([217.147.94.29]) + by libre-soc.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) + (Exim 4.89) (envelope-from ) id 1jYLc5-0004G6-TQ + for libre-riscv-dev@lists.libre-riscv.org; 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