From: James E Wilson Date: Fri, 3 Sep 2004 20:12:29 +0000 (+0000) Subject: More MIPS vector cleanup work. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=b30d77c4d8698bf37710352d848cff181fdbba8a;p=gcc.git More MIPS vector cleanup work. * config/mips/mips.h (TARGET_CPU_CPP_BUILTINS): Add __mips3d. * config/mips/generic.md (generic_frecip_fsqrt_step): New. * config/mips/mips-ps-3d.md (mips_rsqrt1_): Use frsqrt1 type. (mips_rsqrt2_): Use frsqrt2 type. (mips_recip1_): Use frdiv1 type. (mips_recip2_): Use frdiv2 type. * config/mips/mips.md (type): Add frdiv1, frdiv2, frsqrt1, frsqrt2. * config/mips/sb1.md (ir_sb1_fpu_2pipes, ir_sb1_fpu_1pipe): Add frdiv1 and frsqrt1. (ir_sb1_fpu_step2_2pipes, ir_sb1_fpu_step2_1pipe): New. From-SVN: r87050 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index c20d4a9b5d3..311f24c1fc1 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,17 @@ +2004-09-03 James E Wilson + + * config/mips/mips.h (TARGET_CPU_CPP_BUILTINS): Add __mips3d. + + * config/mips/generic.md (generic_frecip_fsqrt_step): New. + * config/mips/mips-ps-3d.md (mips_rsqrt1_): Use frsqrt1 type. + (mips_rsqrt2_): Use frsqrt2 type. + (mips_recip1_): Use frdiv1 type. + (mips_recip2_): Use frdiv2 type. + * config/mips/mips.md (type): Add frdiv1, frdiv2, frsqrt1, frsqrt2. + * config/mips/sb1.md (ir_sb1_fpu_2pipes, ir_sb1_fpu_1pipe): Add frdiv1 + and frsqrt1. + (ir_sb1_fpu_step2_2pipes, ir_sb1_fpu_step2_1pipe): New. + 2004-09-03 Daniel Jacobowitz * reload.c (find_reloads): Swap operand_loc pointers for diff --git a/gcc/config/mips/generic.md b/gcc/config/mips/generic.md index 6ae56490965..237272eb8af 100644 --- a/gcc/config/mips/generic.md +++ b/gcc/config/mips/generic.md @@ -100,3 +100,7 @@ (and (eq_attr "type" "fsqrt,frsqrt") (eq_attr "mode" "DF")) "alu") + +(define_insn_reservation "generic_frecip_fsqrt_step" 5 + (eq_attr "type" "frdiv1,frdiv2,frsqrt1,frsqrt2") + "alu") diff --git a/gcc/config/mips/mips-ps-3d.md b/gcc/config/mips/mips-ps-3d.md index c2615619b05..766abdc3d64 100644 --- a/gcc/config/mips/mips-ps-3d.md +++ b/gcc/config/mips/mips-ps-3d.md @@ -444,7 +444,7 @@ UNSPEC_RSQRT1))] "TARGET_MIPS3D" "rsqrt1.\t%0,%1" - [(set_attr "type" "frsqrt") + [(set_attr "type" "frsqrt1") (set_attr "mode" "")]) (define_insn "mips_rsqrt2_" @@ -454,7 +454,7 @@ UNSPEC_RSQRT2))] "TARGET_MIPS3D" "rsqrt2.\t%0,%1,%2" - [(set_attr "type" "frsqrt") + [(set_attr "type" "frsqrt2") (set_attr "mode" "")]) (define_insn "mips_recip1_" @@ -463,7 +463,7 @@ UNSPEC_RECIP1))] "TARGET_MIPS3D" "recip1.\t%0,%1" - [(set_attr "type" "frdiv") + [(set_attr "type" "frdiv1") (set_attr "mode" "")]) (define_insn "mips_recip2_" @@ -473,5 +473,5 @@ UNSPEC_RECIP2))] "TARGET_MIPS3D" "recip2.\t%0,%1,%2" - [(set_attr "type" "frdiv") + [(set_attr "type" "frdiv2") (set_attr "mode" "")]) diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h index bebddce9e74..8862e5816b6 100644 --- a/gcc/config/mips/mips.h +++ b/gcc/config/mips/mips.h @@ -411,6 +411,9 @@ extern const struct mips_cpu_info *mips_tune_info; if (TARGET_MIPS16) \ builtin_define ("__mips16"); \ \ + if (TARGET_MIPS3D) \ + builtin_define ("__mips3d"); \ + \ MIPS_CPP_SET_PROCESSOR ("_MIPS_ARCH", mips_arch_info); \ MIPS_CPP_SET_PROCESSOR ("_MIPS_TUNE", mips_tune_info); \ \ diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md index df32a546d6c..54bc7c3e251 100644 --- a/gcc/config/mips/mips.md +++ b/gcc/config/mips/mips.md @@ -133,16 +133,20 @@ ;; fmadd floating point multiply-add ;; fdiv floating point divide ;; frdiv floating point reciprocal divide +;; frdiv1 floating point reciprocal divide step 1 +;; frdiv2 floating point reciprocal divide step 2 ;; fabs floating point absolute value ;; fneg floating point negation ;; fcmp floating point compare ;; fcvt floating point convert ;; fsqrt floating point square root ;; frsqrt floating point reciprocal square root +;; frsqrt1 floating point reciprocal square root step1 +;; frsqrt2 floating point reciprocal square root step2 ;; multi multiword sequence (or user asm statements) ;; nop no operation (define_attr "type" - "unknown,branch,jump,call,load,fpload,fpidxload,store,fpstore,fpidxstore,prefetch,prefetchx,condmove,xfer,mthilo,mfhilo,const,arith,shift,slt,clz,trap,imul,imadd,idiv,fmove,fadd,fmul,fmadd,fdiv,frdiv,fabs,fneg,fcmp,fcvt,fsqrt,frsqrt,multi,nop" + "unknown,branch,jump,call,load,fpload,fpidxload,store,fpstore,fpidxstore,prefetch,prefetchx,condmove,xfer,mthilo,mfhilo,const,arith,shift,slt,clz,trap,imul,imadd,idiv,fmove,fadd,fmul,fmadd,fdiv,frdiv,frdiv1,frdiv2,fabs,fneg,fcmp,fcvt,fsqrt,frsqrt,frsqrt1,frsqrt2,multi,nop" (cond [(eq_attr "jal" "!unset") (const_string "call") (eq_attr "got" "load") (const_string "load")] (const_string "unknown"))) diff --git a/gcc/config/mips/sb1.md b/gcc/config/mips/sb1.md index 8e28e79a632..3ab033302fd 100644 --- a/gcc/config/mips/sb1.md +++ b/gcc/config/mips/sb1.md @@ -353,13 +353,25 @@ (define_insn_reservation "ir_sb1_fpu_2pipes" 4 (and (eq_attr "cpu" "sb1") - (and (eq_attr "type" "fmove,fadd,fmul,fabs,fneg,fcvt") + (and (eq_attr "type" "fmove,fadd,fmul,fabs,fneg,fcvt,frdiv1,frsqrt1") (eq_attr "sb1_fp_pipes" "two"))) "sb1_fp1 | sb1_fp0") (define_insn_reservation "ir_sb1_fpu_1pipe" 4 (and (eq_attr "cpu" "sb1") - (and (eq_attr "type" "fmove,fadd,fmul,fabs,fneg,fcvt") + (and (eq_attr "type" "fmove,fadd,fmul,fabs,fneg,fcvt,frdiv1,frsqrt1") + (eq_attr "sb1_fp_pipes" "one"))) + "sb1_fp1") + +(define_insn_reservation "ir_sb1_fpu_step2_2pipes" 8 + (and (eq_attr "cpu" "sb1") + (and (eq_attr "type" "frdiv2,frsqrt2") + (eq_attr "sb1_fp_pipes" "two"))) + "sb1_fp1 | sb1_fp0") + +(define_insn_reservation "ir_sb1_fpu_step2_1pipe" 8 + (and (eq_attr "cpu" "sb1") + (and (eq_attr "type" "frdiv2,frsqrt2") (eq_attr "sb1_fp_pipes" "one"))) "sb1_fp1")