From: Clifford Wolf <clifford@clifford.at>
Date: Sat, 17 Jan 2015 11:04:40 +0000 (+0100)
Subject: Optimizing no-op cell->setPort()
X-Git-Tag: yosys-0.5~96
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=b32ba6f56802b7cb8bb6098ee895d4ad37438ff8;p=yosys.git

Optimizing no-op cell->setPort()
---

diff --git a/kernel/rtlil.cc b/kernel/rtlil.cc
index d396d6c24..b35cbc3d1 100644
--- a/kernel/rtlil.cc
+++ b/kernel/rtlil.cc
@@ -1839,7 +1839,9 @@ void RTLIL::Cell::setPort(RTLIL::IdString portname, RTLIL::SigSpec signal)
 		connections_[portname] = RTLIL::SigSpec();
 		conn_it = connections_.find(portname);
 		log_assert(conn_it != connections_.end());
-	}
+	} else
+	if (conn_it->second == signal)
+		return;
 
 	for (auto mon : module->monitors)
 		mon->notify_connect(this, conn_it->first, conn_it->second, signal);