From: R Veera Kumar Date: Thu, 11 Nov 2021 02:55:54 +0000 (+0530) Subject: Add expected state to case_1_regression for extsb in alu_cases unit test X-Git-Tag: sv_maxu_works-initial~753 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=b35ed2c742520bf08066a96bc9f929ff00fd08b2;p=openpower-isa.git Add expected state to case_1_regression for extsb in alu_cases unit test --- diff --git a/src/openpower/test/alu/alu_cases.py b/src/openpower/test/alu/alu_cases.py index c023ee06..bd43ecc3 100644 --- a/src/openpower/test/alu/alu_cases.py +++ b/src/openpower/test/alu/alu_cases.py @@ -40,7 +40,10 @@ class ALUTestCase(TestAccumulatorBase): lst = [f"extsb 3, 1"] initial_regs = [0] * 32 initial_regs[1] = 0x7f9497aaff900ea0 - self.add_case(Program(lst, bigendian), initial_regs) + e = ExpectedState(pc=4) + e.intregs[1] = 0x7f9497aaff900ea0 + e.intregs[3] = 0xffffffffffffffa0 + self.add_case(Program(lst, bigendian), initial_regs, expected=e) lst = [f"add. 3, 1, 2"] initial_regs = [0] * 32 initial_regs[1] = 0xc523e996a8ff6215