From: Jacob Lifshay <programmerjake@gmail.com>
Date: Mon, 7 Aug 2023 23:04:00 +0000 (-0700)
Subject: split out instructions from openpower/isa/comparefixed.mdwn
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=b3ad4d6dbb76abfc991c36bcc90d5bee6239ca7a;p=openpower-isa.git

split out instructions from openpower/isa/comparefixed.mdwn
---

diff --git a/openpower/isa/comparefixed.mdwn b/openpower/isa/comparefixed.mdwn
index af92870a..940a9032 100644
--- a/openpower/isa/comparefixed.mdwn
+++ b/openpower/isa/comparefixed.mdwn
@@ -7,137 +7,14 @@
 <!-- UI field, or (3) the contents of register RB. The comparison is signed for cmpi -->
 <!-- and cmp, and unsigned for cmpli and cmpl. -->
 
-# Compare Immediate
+[[!inline pagenames="openpower/isa/comparefixed/cmpi" raw="yes"]]
 
-D-Form
+[[!inline pagenames="openpower/isa/comparefixed/cmp" raw="yes"]]
 
-* cmpi BF,L,RA,SI
+[[!inline pagenames="openpower/isa/comparefixed/cmpli" raw="yes"]]
 
-Pseudo-code:
+[[!inline pagenames="openpower/isa/comparefixed/cmpl" raw="yes"]]
 
-    if L = 0 then a <- EXTS((RA)[XLEN/2:XLEN-1])
-    else a <-  (RA)
-    if      a < EXTS(SI) then c <- 0b100
-    else if a > EXTS(SI) then c <- 0b010
-    else                      c <- 0b001
-    CR[4*BF+32:4*BF+35] <- c || XER[SO]
+[[!inline pagenames="openpower/isa/comparefixed/cmprb" raw="yes"]]
 
-Special Registers Altered:
-
-    CR field BF
-
-# Compare
-
-X-Form
-
-* cmp BF,L,RA,RB
-
-Pseudo-code:
-
-    if L = 0 then
-        a <- EXTS((RA)[XLEN/2:XLEN-1])
-        b <- EXTS((RB)[XLEN/2:XLEN-1])
-    else
-        a <- (RA)
-        b <- (RB)
-    if      a < b then c <-  0b100
-    else if a > b then c <-  0b010
-    else               c <-  0b001
-    CR[4*BF+32:4*BF+35] <-  c || XER[SO]
-
-Special Registers Altered:
-
-    CR field BF
-
-# Compare Logical Immediate
-
-D-Form
-
-* cmpli BF,L,RA,UI
-
-Pseudo-code:
-
-    if L = 0 then a <- [0]*(XLEN/2) || (RA)[XLEN/2:XLEN-1]
-    else a <- (RA)
-    if      a <u ([0]*(XLEN-16) || UI) then c <- 0b100
-    else if a >u ([0]*(XLEN-16) || UI) then c <- 0b010
-    else                             c <- 0b001
-    CR[4*BF+32:4*BF+35] <- c || XER[SO]
-
-Special Registers Altered:
-
-    CR field BF
-
-# Compare Logical
-
-X-Form
-
-* cmpl BF,L,RA,RB
-
-Pseudo-code:
-
-    if L = 0 then
-        a <- [0]*(XLEN/2) || (RA)[XLEN/2:XLEN-1]
-        b <- [0]*(XLEN/2) || (RB)[XLEN/2:XLEN-1]
-    else
-        a <-  (RA)
-        b <-  (RB)
-    if      a <u b then c <- 0b100
-    else if a >u b then c <- 0b010
-    else                c <-  0b001
-    CR[4*BF+32:4*BF+35] <- c || XER[SO]
-
-Special Registers Altered:
-
-    CR field BF
-
-# Compare Ranged Byte
-
-X-Form
-
-* cmprb BF,L,RA,RB
-
-Pseudo-code:
-
-    src1    <- EXTZ((RA)[XLEN-8:XLEN-1])
-    src21hi <- EXTZ((RB)[XLEN-32:XLEN-23])
-    src21lo <- EXTZ((RB)[XLEN-24:XLEN-17])
-    src22hi <- EXTZ((RB)[XLEN-16:XLEN-9])
-    src22lo <- EXTZ((RB)[XLEN-8:XLEN-1])
-    if L=0 then
-       in_range <-  (src22lo  <= src1) & (src1 <=  src22hi)
-    else
-       in_range <- (((src21lo  <= src1) & (src1 <=  src21hi)) |
-                    ((src22lo  <= src1) & (src1 <=  src22hi)))
-    CR[4*BF+32] <- 0b0
-    CR[4*BF+33] <- in_range
-    CR[4*BF+34] <- 0b0
-    CR[4*BF+35] <- 0b0
-
-Special Registers Altered:
-
-    CR field BF
-
-# Compare Equal Byte
-
-X-Form
-
-* cmpeqb BF,RA,RB
-
-Pseudo-code:
-
-    src1 <- GPR[RA]
-    src1 <- src1[XLEN-8:XLEN-1]
-    match <- 0b0
-    for i = 0 to ((XLEN/8)-1)
-        match <- (match | (src1 = (RB)[8*i:8*i+7]))
-    CR[4*BF+32] <- 0b0
-    CR[4*BF+33] <- match
-    CR[4*BF+34] <- 0b0
-    CR[4*BF+35] <- 0b0
-
-Special Registers Altered:
-
-    CR field BF
-
-<!-- Checked March 2021 -->
+[[!inline pagenames="openpower/isa/comparefixed/cmpeqb" raw="yes"]]
diff --git a/openpower/isa/comparefixed/cmp.mdwn b/openpower/isa/comparefixed/cmp.mdwn
new file mode 100644
index 00000000..4cabf2e4
--- /dev/null
+++ b/openpower/isa/comparefixed/cmp.mdwn
@@ -0,0 +1,13 @@
+# Compare
+
+X-Form
+
+* cmp BF,L,RA,RB
+
+Pseudo-code:
+
+[[!inline pagenames="openpower/isa/comparefixed/cmp_code" raw="yes"]]
+
+Special Registers Altered:
+
+    CR field BF
diff --git a/openpower/isa/comparefixed/cmp_code.mdwn b/openpower/isa/comparefixed/cmp_code.mdwn
new file mode 100644
index 00000000..0fa8f003
--- /dev/null
+++ b/openpower/isa/comparefixed/cmp_code.mdwn
@@ -0,0 +1,10 @@
+    if L = 0 then
+        a <- EXTS((RA)[XLEN/2:XLEN-1])
+        b <- EXTS((RB)[XLEN/2:XLEN-1])
+    else
+        a <- (RA)
+        b <- (RB)
+    if      a < b then c <-  0b100
+    else if a > b then c <-  0b010
+    else               c <-  0b001
+    CR[4*BF+32:4*BF+35] <-  c || XER[SO]
diff --git a/openpower/isa/comparefixed/cmpeqb.mdwn b/openpower/isa/comparefixed/cmpeqb.mdwn
new file mode 100644
index 00000000..ae124718
--- /dev/null
+++ b/openpower/isa/comparefixed/cmpeqb.mdwn
@@ -0,0 +1,15 @@
+# Compare Equal Byte
+
+X-Form
+
+* cmpeqb BF,RA,RB
+
+Pseudo-code:
+
+[[!inline pagenames="openpower/isa/comparefixed/cmpeqb_code" raw="yes"]]
+
+Special Registers Altered:
+
+    CR field BF
+
+<!-- Checked March 2021 -->
diff --git a/openpower/isa/comparefixed/cmpeqb_code.mdwn b/openpower/isa/comparefixed/cmpeqb_code.mdwn
new file mode 100644
index 00000000..b742e6e4
--- /dev/null
+++ b/openpower/isa/comparefixed/cmpeqb_code.mdwn
@@ -0,0 +1,9 @@
+    src1 <- GPR[RA]
+    src1 <- src1[XLEN-8:XLEN-1]
+    match <- 0b0
+    for i = 0 to ((XLEN/8)-1)
+        match <- (match | (src1 = (RB)[8*i:8*i+7]))
+    CR[4*BF+32] <- 0b0
+    CR[4*BF+33] <- match
+    CR[4*BF+34] <- 0b0
+    CR[4*BF+35] <- 0b0
diff --git a/openpower/isa/comparefixed/cmpi.mdwn b/openpower/isa/comparefixed/cmpi.mdwn
new file mode 100644
index 00000000..c1a7fb3d
--- /dev/null
+++ b/openpower/isa/comparefixed/cmpi.mdwn
@@ -0,0 +1,13 @@
+# Compare Immediate
+
+D-Form
+
+* cmpi BF,L,RA,SI
+
+Pseudo-code:
+
+[[!inline pagenames="openpower/isa/comparefixed/cmpi_code" raw="yes"]]
+
+Special Registers Altered:
+
+    CR field BF
diff --git a/openpower/isa/comparefixed/cmpi_code.mdwn b/openpower/isa/comparefixed/cmpi_code.mdwn
new file mode 100644
index 00000000..55d4aeb2
--- /dev/null
+++ b/openpower/isa/comparefixed/cmpi_code.mdwn
@@ -0,0 +1,6 @@
+    if L = 0 then a <- EXTS((RA)[XLEN/2:XLEN-1])
+    else a <-  (RA)
+    if      a < EXTS(SI) then c <- 0b100
+    else if a > EXTS(SI) then c <- 0b010
+    else                      c <- 0b001
+    CR[4*BF+32:4*BF+35] <- c || XER[SO]
diff --git a/openpower/isa/comparefixed/cmpl.mdwn b/openpower/isa/comparefixed/cmpl.mdwn
new file mode 100644
index 00000000..d5c533de
--- /dev/null
+++ b/openpower/isa/comparefixed/cmpl.mdwn
@@ -0,0 +1,13 @@
+# Compare Logical
+
+X-Form
+
+* cmpl BF,L,RA,RB
+
+Pseudo-code:
+
+[[!inline pagenames="openpower/isa/comparefixed/cmpl_code" raw="yes"]]
+
+Special Registers Altered:
+
+    CR field BF
diff --git a/openpower/isa/comparefixed/cmpl_code.mdwn b/openpower/isa/comparefixed/cmpl_code.mdwn
new file mode 100644
index 00000000..5a3d79cf
--- /dev/null
+++ b/openpower/isa/comparefixed/cmpl_code.mdwn
@@ -0,0 +1,10 @@
+    if L = 0 then
+        a <- [0]*(XLEN/2) || (RA)[XLEN/2:XLEN-1]
+        b <- [0]*(XLEN/2) || (RB)[XLEN/2:XLEN-1]
+    else
+        a <-  (RA)
+        b <-  (RB)
+    if      a <u b then c <- 0b100
+    else if a >u b then c <- 0b010
+    else                c <-  0b001
+    CR[4*BF+32:4*BF+35] <- c || XER[SO]
diff --git a/openpower/isa/comparefixed/cmpli.mdwn b/openpower/isa/comparefixed/cmpli.mdwn
new file mode 100644
index 00000000..6ec14ce7
--- /dev/null
+++ b/openpower/isa/comparefixed/cmpli.mdwn
@@ -0,0 +1,13 @@
+# Compare Logical Immediate
+
+D-Form
+
+* cmpli BF,L,RA,UI
+
+Pseudo-code:
+
+[[!inline pagenames="openpower/isa/comparefixed/cmpli_code" raw="yes"]]
+
+Special Registers Altered:
+
+    CR field BF
diff --git a/openpower/isa/comparefixed/cmpli_code.mdwn b/openpower/isa/comparefixed/cmpli_code.mdwn
new file mode 100644
index 00000000..9515576b
--- /dev/null
+++ b/openpower/isa/comparefixed/cmpli_code.mdwn
@@ -0,0 +1,6 @@
+    if L = 0 then a <- [0]*(XLEN/2) || (RA)[XLEN/2:XLEN-1]
+    else a <- (RA)
+    if      a <u ([0]*(XLEN-16) || UI) then c <- 0b100
+    else if a >u ([0]*(XLEN-16) || UI) then c <- 0b010
+    else                             c <- 0b001
+    CR[4*BF+32:4*BF+35] <- c || XER[SO]
diff --git a/openpower/isa/comparefixed/cmprb.mdwn b/openpower/isa/comparefixed/cmprb.mdwn
new file mode 100644
index 00000000..bde0f09d
--- /dev/null
+++ b/openpower/isa/comparefixed/cmprb.mdwn
@@ -0,0 +1,13 @@
+# Compare Ranged Byte
+
+X-Form
+
+* cmprb BF,L,RA,RB
+
+Pseudo-code:
+
+[[!inline pagenames="openpower/isa/comparefixed/cmprb_code" raw="yes"]]
+
+Special Registers Altered:
+
+    CR field BF
diff --git a/openpower/isa/comparefixed/cmprb_code.mdwn b/openpower/isa/comparefixed/cmprb_code.mdwn
new file mode 100644
index 00000000..38f4f674
--- /dev/null
+++ b/openpower/isa/comparefixed/cmprb_code.mdwn
@@ -0,0 +1,14 @@
+    src1    <- EXTZ((RA)[XLEN-8:XLEN-1])
+    src21hi <- EXTZ((RB)[XLEN-32:XLEN-23])
+    src21lo <- EXTZ((RB)[XLEN-24:XLEN-17])
+    src22hi <- EXTZ((RB)[XLEN-16:XLEN-9])
+    src22lo <- EXTZ((RB)[XLEN-8:XLEN-1])
+    if L=0 then
+       in_range <-  (src22lo  <= src1) & (src1 <=  src22hi)
+    else
+       in_range <- (((src21lo  <= src1) & (src1 <=  src21hi)) |
+                    ((src22lo  <= src1) & (src1 <=  src22hi)))
+    CR[4*BF+32] <- 0b0
+    CR[4*BF+33] <- in_range
+    CR[4*BF+34] <- 0b0
+    CR[4*BF+35] <- 0b0