From: Vineet Gupta <vgupta@synopsys.com>
Date: Wed, 23 Jan 2019 11:04:19 +0000 (+0000)
Subject: [ARC] atomics: Add operand to DMB instruction
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=b3e5901b625df90e3618b2e5a06cccc36cd84b6a;p=gcc.git

[ARC] atomics: Add operand to DMB instruction

Atomics use DMB instruction to enforce ordering of loads/stores.
Currently gcc generates DMB w/o any arg which is a no-op. Fix that by
generating DMB 3 which enforces R+W ordering. It is stricter than what
acq/rel expect, but there's no other way.

gcc/

2019-xx-xx  Vineet Gupta <vgupta@synopsys.com>

       * config/arc/atomic.md: Add operand to DMB instruction

From-SVN: r268181
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 4a83a8aca4c..f1522bec614 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,7 @@
+2019-01-23  Vineet Gupta  <vgupta@synopsys.com>
+
+	* config/arc/atomic.md: Add operand to DMB instruction.
+
 2019-01-23  Jakub Jelinek  <jakub@redhat.com>
 
 	PR tree-optimization/88964
diff --git a/gcc/config/arc/atomic.md b/gcc/config/arc/atomic.md
index 562c79a6578..fe767dfedd5 100644
--- a/gcc/config/arc/atomic.md
+++ b/gcc/config/arc/atomic.md
@@ -44,7 +44,7 @@
   {
    if (TARGET_HS)
       {
-       return "dmb";
+       return "dmb\\t3";
       }
     else
       {