From: Max Filippov Date: Fri, 23 Apr 2021 09:03:36 +0000 (-0700) Subject: opcodes: xtensa: display loaded literal value X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=b3ea76397a07f5ec99432ed3df9ca848a6aab115;p=binutils-gdb.git opcodes: xtensa: display loaded literal value Display literal value loaded with l32r opcode as a part of disassembly. This significantly simplifies reading of disassembly output. 2020-04-23 Max Filippov opcodes/ * xtensa-dis.c (print_xtensa_operand): For PC-relative operand of l32r fetch and display referenced literal value. --- diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index c26cddffd60..bf495d02a07 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,8 @@ +2020-04-23 Max Filippov + + * xtensa-dis.c (print_xtensa_operand): For PC-relative operand + of l32r fetch and display referenced literal value. + 2021-04-23 Max Filippov * xtensa-dis.c (print_insn_xtensa): Set info->bytes_per_chunk diff --git a/opcodes/xtensa-dis.c b/opcodes/xtensa-dis.c index e38fc39f4e7..cfa058f96c7 100644 --- a/opcodes/xtensa-dis.c +++ b/opcodes/xtensa-dis.c @@ -194,7 +194,8 @@ print_xtensa_operand (bfd_vma memaddr, unsigned operand_val) { xtensa_isa isa = xtensa_default_isa; - int signed_operand_val; + int signed_operand_val, status; + bfd_byte litbuf[4]; if (show_raw_fields) { @@ -216,6 +217,23 @@ print_xtensa_operand (bfd_vma memaddr, &operand_val, memaddr); info->target = operand_val; (*info->print_address_func) (info->target, info); + /* Also display value loaded by L32R (but not if reloc exists, + those tend to be wrong): */ + if ((info->flags & INSN_HAS_RELOC) == 0 + && !strcmp ("l32r", xtensa_opcode_name (isa, opc))) + status = (*info->read_memory_func) (operand_val, litbuf, 4, info); + else + status = -1; + + if (status == 0) + { + unsigned literal = bfd_get_bits (litbuf, 32, + info->endian == BFD_ENDIAN_BIG); + + (*info->fprintf_func) (info->stream, " ("); + (*info->print_address_func) (literal, info); + (*info->fprintf_func) (info->stream, ")"); + } } else {