From: lkcl <lkcl@web>
Date: Fri, 8 May 2020 11:06:16 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: convert-csv-opcode-to-binary~2705
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=b40f0c0688e4aee931450591b859e3757660e177;p=libreriscv.git

---

diff --git a/180nm_Oct2020/interfaces.mdwn b/180nm_Oct2020/interfaces.mdwn
index 09a17ec4a..eb9156803 100644
--- a/180nm_Oct2020/interfaces.mdwn
+++ b/180nm_Oct2020/interfaces.mdwn
@@ -2,11 +2,11 @@
 
 These are bare minimum viability:
 
-* [[UART]]
-* [[I2C]]
-* [[GPIO]]
-* [[SPI]]
-* [[QSPI]]
-* [[LPC]]
-* [[EINT]]
+* [[m_class/UART]]
+* [[m_class/I2C]]
+* [[m_class/GPIO]]
+* [[m_class/SPI]]
+* [[m_class/QSPI]]
+* [[m_class/LPC]]
+* [[m_class/EINT]]