From: Andrew Waterman <andrew@sifive.com>
Date: Tue, 21 Feb 2017 01:17:17 +0000 (-0800)
Subject: Take M-mode interrupts over S-mode interrupts
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=b47e8c0a190ac17d2622d5554b21bc871d56847a;p=riscv-isa-sim.git

Take M-mode interrupts over S-mode interrupts
---

diff --git a/riscv/processor.cc b/riscv/processor.cc
index 706c0bc..29307fd 100644
--- a/riscv/processor.cc
+++ b/riscv/processor.cc
@@ -172,7 +172,8 @@ void processor_t::take_interrupt(reg_t pending_interrupts)
 
   reg_t sie = get_field(state.mstatus, MSTATUS_SIE);
   reg_t s_enabled = state.prv < PRV_S || (state.prv == PRV_S && sie);
-  enabled_interrupts |= pending_interrupts & state.mideleg & -s_enabled;
+  if (enabled_interrupts == 0)
+    enabled_interrupts = pending_interrupts & state.mideleg & -s_enabled;
 
   if (enabled_interrupts)
     throw trap_t(((reg_t)1 << (max_xlen-1)) | ctz(enabled_interrupts));