From: Gabe Black <gblack@eecs.umich.edu>
Date: Mon, 20 Nov 2006 23:08:50 +0000 (-0500)
Subject: Make sure only real bits of pstate can be set.
X-Git-Tag: m5_2.0_beta3~313
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=b4a31cb8b554056fa48ad3986c4f011b8d312306;p=gem5.git

Make sure only real bits of pstate can be set.

--HG--
extra : convert_revision : 8707bbed2aeb80613f86503e92b63853767adaa9
---

diff --git a/src/arch/sparc/miscregfile.cc b/src/arch/sparc/miscregfile.cc
index 8ca3d66f9..a60288984 100644
--- a/src/arch/sparc/miscregfile.cc
+++ b/src/arch/sparc/miscregfile.cc
@@ -62,6 +62,11 @@ string SparcISA::getMiscRegName(RegIndex index)
     return miscRegName[index];
 }
 
+enum RegMask
+{
+        PSTATE_MASK = (((1 << 4) - 1) << 1) | (((1 << 4) - 1) << 6) | (1 << 12)
+};
+
 void MiscRegFile::reset()
 {
     y = 0;
@@ -275,7 +280,7 @@ void MiscRegFile::setReg(int miscReg, const MiscReg &val)
           tba = val & ULL(~0x7FFF);
           break;
         case MISCREG_PSTATE:
-          pstate = val;
+          pstate = (val & PSTATE_MASK);
           break;
         case MISCREG_TL:
           tl = val;
@@ -377,7 +382,7 @@ void MiscRegFile::setRegWithEffect(int miscReg,
           //Set up performance counting based on pcr value
           break;
         case MISCREG_PSTATE:
-          pstate = val;
+          pstate = val & PSTATE_MASK;
           setImplicitAsis();
           return;
         case MISCREG_TL: