From: enjoy-digital Date: Tue, 28 Jan 2020 14:36:24 +0000 (+0100) Subject: Merge pull request #363 from antmicro/litex-sim-ddr4 X-Git-Tag: 24jan2021_ls180~707 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=b4b56db4e31fb8674c767f17ce4e9e851aed85ea;p=litex.git Merge pull request #363 from antmicro/litex-sim-ddr4 tools/litex_sim: add ddr4 PhySettings --- b4b56db4e31fb8674c767f17ce4e9e851aed85ea