From: Andrew Stubbs <ams@codesourcery.com>
Date: Mon, 6 Jan 2020 15:40:01 +0000 (+0000)
Subject: Fix early-clobber in amdgcn vec_extract
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=b4d74ed7660295d23ec33d84150b2d3073126eb4;p=gcc.git

Fix early-clobber in amdgcn vec_extract

2020-01-06  Andrew Stubbs  <ams@codesourcery.com>

	gcc/
	* config/gcn/gcn-valu.md (vec_extract<mode><scalar_mode>): Add early
	clobber.

From-SVN: r279904
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 820a86f353d..8084d5ca512 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2020-01-06  Andrew Stubbs  <ams@codesourcery.com>
+
+	* config/gcn/gcn-valu.md (vec_extract<mode><scalar_mode>): Add early
+	clobber.
+
 2020-01-06  Richard Sandiford  <richard.sandiford@arm.com>
 
 	* config/aarch64/t-aarch64 ($(srcdir)/config/aarch64/aarch64-tune.md):
diff --git a/gcc/config/gcn/gcn-valu.md b/gcc/config/gcn/gcn-valu.md
index 457a66c1505..9baef24b1c8 100644
--- a/gcc/config/gcn/gcn-valu.md
+++ b/gcc/config/gcn/gcn-valu.md
@@ -580,10 +580,10 @@
    (set_attr "laneselect" "yes")])
 
 (define_insn "vec_extract<mode><scalar_mode>"
-  [(set (match_operand:<SCALAR_MODE> 0 "register_operand"   "=Sg")
+  [(set (match_operand:<SCALAR_MODE> 0 "register_operand"   "=&Sg")
 	(vec_select:<SCALAR_MODE>
-	  (match_operand:VEC_2REG_MODE 1 "register_operand" "  v")
-	  (parallel [(match_operand:SI 2 "gcn_alu_operand"  "SvB")])))]
+	  (match_operand:VEC_2REG_MODE 1 "register_operand" "   v")
+	  (parallel [(match_operand:SI 2 "gcn_alu_operand"  " SvB")])))]
   ""
   "v_readlane_b32 %L0, %L1, %2\;v_readlane_b32 %H0, %H1, %2"
   [(set_attr "type" "vmult")