From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Thu, 13 Aug 2020 21:23:18 +0000 (+0100)
Subject: code-shuffle
X-Git-Tag: semi_working_ecp5~364
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=b4decc2226adcd5b20370954d8de91de72782833;p=soc.git

code-shuffle
---

diff --git a/src/soc/experiment/compalu_multi.py b/src/soc/experiment/compalu_multi.py
index dbd47c8c..b2612c59 100644
--- a/src/soc/experiment/compalu_multi.py
+++ b/src/soc/experiment/compalu_multi.py
@@ -165,7 +165,7 @@ class MultiCompUnit(RegSpecALUAPI, Elaboratable):
         # to trigger *from* the opcode latch instead.
         src_or_imm = Signal(self.cu._get_srcwid(i), reset_less=True)
         src_sel = Signal(reset_less=True)
-        m.d.comb += src_sel.eq(Mux(op_is_imm, self.opc_l.q, self.src_l.q[i]))
+        m.d.comb += src_sel.eq(Mux(op_is_imm, self.opc_l.q, sl[i][2]))
         m.d.comb += src_or_imm.eq(Mux(op_is_imm, imm, self.src_i[i]))
         # overwrite 1st src-latch with immediate-muxed stuff
         sl[i][0] = src_or_imm