From: lkcl <lkcl@web>
Date: Tue, 28 Jun 2022 04:33:57 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~1485
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=b4e099b0da1f5965b72c8c8cff623936aeceda28;p=libreriscv.git

---

diff --git a/openpower/sv/branches.mdwn b/openpower/sv/branches.mdwn
index cc3030ea1..fb9b9da34 100644
--- a/openpower/sv/branches.mdwn
+++ b/openpower/sv/branches.mdwn
@@ -572,11 +572,14 @@ else
     if SVRMmode.VLI then SVSTATE.VL = srcstep+1
     else                 SVSTATE.VL = srcstep
   lr_ok <- LK
+  svlr_ok <- SVRMmode.SL
   if ctr_ok & cond_ok then
     if AA then NIA <-iea EXTS(BD || 0b00)
     else       NIA <-iea CIA + EXTS(BD || 0b00)
     if SVRMmode.LRu then lr_ok <- ¬lr_ok
-  if lr_ok then LR <-iea CIA + 4
+    if SVRMmode.SLu then svlr_ok <- ¬svlr_ok
+  if lr_ok   then LR   <-iea CIA + 4
+  if svlr_ok then SVLR <- SVSTATE
 ```
 
 Below is the pseudocode for SVP64 Branches, which is a little less