From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Tue, 21 Dec 2021 23:50:47 +0000 (+0000)
Subject: continue to assert PC in FetchFSM if needed
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=b54612199531fcf960722e9e8c03f3b242f551f7;p=soc.git

continue to assert PC in FetchFSM if needed
---

diff --git a/src/soc/simple/issuer.py b/src/soc/simple/issuer.py
index 15642018..ffb7dc97 100644
--- a/src/soc/simple/issuer.py
+++ b/src/soc/simple/issuer.py
@@ -750,6 +750,7 @@ class FetchFSM(ControlBase):
                     with m.If(self.imem.f_busy_o &
                               ~pdecode2.instr_fault):  # zzz...
                         # busy but not fetch failed: stay in wait-read
+                        comb += self.imem.a_pc_i.eq(pc)
                         comb += self.imem.a_i_valid.eq(1)
                         comb += self.imem.f_i_valid.eq(1)
                     with m.Else():