From: Kyrylo Tkachov <kyrylo.tkachov@arm.com>
Date: Thu, 18 Sep 2014 10:06:05 +0000 (+0000)
Subject: [ARM] Fix insn type of movmisalign neon load pattern.
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=b5a260238027e86912c39df2147e345ca8a6ed26;p=gcc.git

[ARM] Fix insn type of movmisalign neon load pattern.

	* config/arm/neon.md (*movmisalign<mode>_neon_load): Change type
	to neon_load1_1reg<q>.

From-SVN: r215346
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 8445235e99c..5d859468d65 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2014-09-18  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+
+	* config/arm/neon.md (*movmisalign<mode>_neon_load): Change type
+	to neon_load1_1reg<q>.
+
 2014-09-17  Jakub Jelinek  <jakub@redhat.com>
 
 	PR debug/63284
diff --git a/gcc/config/arm/neon.md b/gcc/config/arm/neon.md
index 38daf35ed84..41cf913a0da 100644
--- a/gcc/config/arm/neon.md
+++ b/gcc/config/arm/neon.md
@@ -296,7 +296,7 @@
 		    UNSPEC_MISALIGNED_ACCESS))]
   "TARGET_NEON && !BYTES_BIG_ENDIAN && unaligned_access"
   "vld1.<V_sz_elem>\t{%q0}, %A1"
-  [(set_attr "type" "neon_store1_1reg<q>")])
+  [(set_attr "type" "neon_load1_1reg<q>")])
 
 (define_insn "vec_set<mode>_internal"
   [(set (match_operand:VD 0 "s_register_operand" "=w,w")