From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Sun, 24 Jul 2022 22:31:52 +0000 (+0100)
Subject: better table
X-Git-Tag: opf_rfc_ls005_v1~1042
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=b5cd782ebe1d472045b1db0243f5dfc191642b15;p=libreriscv.git

better table
---

diff --git a/openpower/sv/executive_summary.mdwn b/openpower/sv/executive_summary.mdwn
index e12817b9c..51a80e532 100644
--- a/openpower/sv/executive_summary.mdwn
+++ b/openpower/sv/executive_summary.mdwn
@@ -34,7 +34,8 @@ designed over a 7 year period with Cray-style Vectors right from the start.*
 
 Simple-V is **not RISC-V and is not RISC-V Vectors**.
 [NEC SX Aurora](https://sxauroratsubasa.sakura.ne.jp/documents/guide/pdfs/Aurora_ISA_guide.pdf),
-[RVV](https://github.com/riscv/riscv-v-spec/blob/master/v-spec.adoc), [Simple-V](https://ftp.libre-soc.org/simple_v_spec.pdf) and
+[RVV](https://github.com/riscv/riscv-v-spec/blob/master/v-spec.adoc),
+[Simple-V](https://ftp.libre-soc.org/simple_v_spec.pdf) and
 [MRISC32](https://github.com/mrisc32/mrisc32)
 are all based on Cray-style Scalable Vectors
 of 30 years ago, hence the similarity,
@@ -52,19 +53,23 @@ hot-loops.
 
 We invented Simple-V to be simple because we don't like complicated.
 
-| description, URL                                                                            |
-|---------------------------------------------------------------------------------------------|
 | **Unit tests and simulator for Power ISA v3.0 and SVP64**                                   |
+|---------------------------------------------------------------------------------------------|
 | <https://git.libre-soc.org/?p=openpower-isa.git;a=tree;f=src/openpower/decoder/isa;hb=HEAD> |
-| - - -                                                                                       |
+
 | **pypowersim tutorial**                                                                     |
+|---------------------------------------------------------------------------------------------|
 | <https://libre-soc.org/docs/pypowersim/>                                                    |
-| - - -                                                                                       |
+
 | **several thousand more ISA unit tests**                                                    |
+|---------------------------------------------------------------------------------------------|
 |  <https://git.libre-soc.org/?p=openpower-isa.git;a=tree;f=src/openpower/test;hb=HEAD>       |
-| - - -                                                                                       |
+
 | **demo, showing 4.5x reduction in program size for MP3 decode, greatly simplifies assembler development** |
-| <https://git.libre-soc.org/?p=openpower-isa.git;a=tree;f=media/audio/mp3;hb=HEAD>           |
-| - - -                                                                                       |
+|-----------------------------------------------------------------------------------------------------------|
+| <https://git.libre-soc.org/?p=openpower-isa.git;a=tree;f=media/audio/mp3;hb=HEAD>                         |
+
 | **binutils support for SVP64**                                                              |
+|---------------------------------------------------------------------------------------------|
 | <https://git.libre-soc.org/?p=binutils-gdb.git;a=shortlog;h=refs/heads/svp64-ng>            |
+