From: Andre Maasikas <amaasikas@gmail.com>
Date: Tue, 8 Dec 2009 09:57:24 +0000 (+0200)
Subject: Merge branch 'mesa_7_7_branch'
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=b5e256c76dea2182c82af2a4f66224735701d55a;p=mesa.git

Merge branch 'mesa_7_7_branch'

Conflicts:
	src/mesa/drivers/dri/r600/r700_assembler.c
	src/mesa/main/version.h
---

b5e256c76dea2182c82af2a4f66224735701d55a
diff --cc src/mesa/drivers/dri/r600/r700_assembler.c
index 309c90fdd0c,67e0ee77463..cf64d170ed6
--- a/src/mesa/drivers/dri/r600/r700_assembler.c
+++ b/src/mesa/drivers/dri/r600/r700_assembler.c
@@@ -4132,739 -3490,29 +4132,734 @@@ GLboolean assemble_LIT(r700_AssemblerBa
          return GL_FALSE;
      }
  
 -    /* dst.z = exp(tmp.x) */
 -    pAsm->D.dst.opcode   = SQ_OP2_INST_EXP_IEEE;
 -    pAsm->D.dst.math     = 1;
 -    pAsm->D.dst.rtype    = dstType;
 -    pAsm->D.dst.reg      = dstReg;
 -    pAsm->D.dst.writex   = 0;
 -    pAsm->D.dst.writey   = 0;
 -    pAsm->D.dst.writez   = 1;
 -    pAsm->D.dst.writew   = 0;
 -
 -    pAsm->S[0].src.rtype = SRC_REG_TEMPORARY;
 -    pAsm->S[0].src.reg   = tmp;
 -    setaddrmode_PVSSRC(&(pAsm->S[0].src), ADDR_ABSOLUTE);
 -    noneg_PVSSRC(&(pAsm->S[0].src));
 -    pAsm->S[0].src.swizzlex = SQ_SEL_X;
 -    pAsm->S[0].src.swizzley = SQ_SEL_X;
 -    pAsm->S[0].src.swizzlez = SQ_SEL_X;
 -    pAsm->S[0].src.swizzlew = SQ_SEL_X;
 -
 -    if( GL_FALSE == next_ins(pAsm) )
 +    /* dst.z = exp(tmp.x) */
 +    pAsm->D.dst.opcode   = SQ_OP2_INST_EXP_IEEE;
 +    pAsm->D.dst.math     = 1;
 +    pAsm->D.dst.rtype    = dstType;
 +    pAsm->D.dst.reg      = dstReg;
 +    pAsm->D.dst.writex   = 0;
 +    pAsm->D.dst.writey   = 0;
 +    pAsm->D.dst.writez   = 1;
 +    pAsm->D.dst.writew   = 0;
 +
 +    pAsm->S[0].src.rtype = SRC_REG_TEMPORARY;
 +    pAsm->S[0].src.reg   = tmp;
 +    setaddrmode_PVSSRC(&(pAsm->S[0].src), ADDR_ABSOLUTE);
 +    noneg_PVSSRC(&(pAsm->S[0].src));
 +    pAsm->S[0].src.swizzlex = SQ_SEL_X;
 +    pAsm->S[0].src.swizzley = SQ_SEL_X;
 +    pAsm->S[0].src.swizzlez = SQ_SEL_X;
 +    pAsm->S[0].src.swizzlew = SQ_SEL_X;
 +
 +    if( GL_FALSE == next_ins(pAsm) )
 +    {
 +        return GL_FALSE;
 +    }
 +
 +    return GL_TRUE;
 +}
 + 
 +GLboolean assemble_MAX(r700_AssemblerBase *pAsm) 
 +{
 +	if( GL_FALSE == checkop2(pAsm) )
 +	{
 +		return GL_FALSE;
 +	}
 +
 +	pAsm->D.dst.opcode = SQ_OP2_INST_MAX; 
 +	
 +	if( GL_FALSE == assemble_dst(pAsm) )
 +	{
 +		return GL_FALSE;
 +	}
 +
 +	if( GL_FALSE == assemble_src(pAsm, 0, -1) )
 +	{
 +		return GL_FALSE;
 +	}
 +
 +	if( GL_FALSE == assemble_src(pAsm, 1, -1) )
 +	{
 +		return GL_FALSE;
 +	}
 +
 +	if( GL_FALSE == next_ins(pAsm) )
 +	{
 +		return GL_FALSE;
 +	}
 +
 +    return GL_TRUE;
 +}
 + 
 +GLboolean assemble_MIN(r700_AssemblerBase *pAsm) 
 +{
 +	if( GL_FALSE == checkop2(pAsm) )
 +	{
 +		return GL_FALSE;
 +	}
 +
 +	pAsm->D.dst.opcode = SQ_OP2_INST_MIN;  
 +
 +	if( GL_FALSE == assemble_dst(pAsm) )
 +	{
 +		return GL_FALSE;
 +	}
 +
 +	if( GL_FALSE == assemble_src(pAsm, 0, -1) )
 +	{
 +		return GL_FALSE;
 +	}
 +
 +	if( GL_FALSE == assemble_src(pAsm, 1, -1) )
 +	{
 +		return GL_FALSE;
 +	}
 + 
 +	if( GL_FALSE == next_ins(pAsm) )
 +	{
 +		return GL_FALSE;
 +	}
 +
 +    return GL_TRUE;
 +}
 + 
 +GLboolean assemble_MOV(r700_AssemblerBase *pAsm) 
 +{
 +    checkop1(pAsm);
 +
 +    pAsm->D.dst.opcode = SQ_OP2_INST_MOV;
 +
 +    if (GL_FALSE == assemble_dst(pAsm))
 +    {
 +        return GL_FALSE;
 +    }
 +
 +    if (GL_FALSE == assemble_src(pAsm, 0, -1))
 +    {
 +        return GL_FALSE;
 +    }
 +
 +    if ( GL_FALSE == next_ins(pAsm) ) 
 +    {
 +        return GL_FALSE;
 +    }
 +
 +    return GL_TRUE;
 +}
 + 
 +GLboolean assemble_MUL(r700_AssemblerBase *pAsm) 
 +{
 +	if( GL_FALSE == checkop2(pAsm) )
 +	{
 +		return GL_FALSE;
 +	}
 +
 +	pAsm->D.dst.opcode = SQ_OP2_INST_MUL;
 +
 +	if( GL_FALSE == assemble_dst(pAsm) )
 +	{
 +		return GL_FALSE;
 +	}
 +
 +	if( GL_FALSE == assemble_src(pAsm, 0, -1) )
 +	{
 +		return GL_FALSE;
 +	}
 +
 +	if( GL_FALSE == assemble_src(pAsm, 1, -1) )
 +	{
 +		return GL_FALSE;
 +	}
 +
 +	if( GL_FALSE == next_ins(pAsm) ) 
 +	{
 +		return GL_FALSE;
 +	}
 +
 +    return GL_TRUE;
 +}
 + 
 +GLboolean assemble_POW(r700_AssemblerBase *pAsm) 
 +{
 +    BITS tmp;
 +
 +    checkop1(pAsm);
 +
 +    tmp = gethelpr(pAsm);
 +
 +    // LG2 tmp.x,     a.swizzle
 +    pAsm->D.dst.opcode = SQ_OP2_INST_LOG_IEEE;  
 +    pAsm->D.dst.math = 1;
 +
 +    setaddrmode_PVSDST(&(pAsm->D.dst), ADDR_ABSOLUTE);
 +    pAsm->D.dst.rtype = DST_REG_TEMPORARY;
 +    pAsm->D.dst.reg   = tmp;
 +    nomask_PVSDST(&(pAsm->D.dst));
 +
 +    if( GL_FALSE == assemble_src(pAsm, 0, -1) )
 +    {
 +        return GL_FALSE;
 +    }
 +
 +    if( GL_FALSE == next_ins(pAsm) ) 
 +    {
 +        return GL_FALSE;
 +    }
 +
 +    // MUL tmp.x,     tmp.x, b.swizzle
 +    pAsm->D.dst.opcode = SQ_OP2_INST_MUL;
 +
 +    setaddrmode_PVSDST(&(pAsm->D.dst), ADDR_ABSOLUTE);
 +    pAsm->D.dst.rtype = DST_REG_TEMPORARY;
 +    pAsm->D.dst.reg = tmp;
 +    nomask_PVSDST(&(pAsm->D.dst));
 +
 +    setaddrmode_PVSSRC(&(pAsm->S[0].src), ADDR_ABSOLUTE);
 +    pAsm->S[0].src.rtype = SRC_REG_TEMPORARY;
 +    pAsm->S[0].src.reg = tmp;
 +    setswizzle_PVSSRC(&(pAsm->S[0].src), SQ_SEL_X);
 +    noneg_PVSSRC(&(pAsm->S[0].src));
 +
 +    if( GL_FALSE == assemble_src(pAsm, 1, -1) )
 +    {
 +        return GL_FALSE;
 +    }
 +
 +    if( GL_FALSE == next_ins(pAsm) ) 
 +    {
 +        return GL_FALSE;
 +    }
 +
 +    // EX2 dst.mask,          tmp.x
 +    // EX2 tmp.x,             tmp.x
 +    pAsm->D.dst.opcode = SQ_OP2_INST_EXP_IEEE;
 +    pAsm->D.dst.math = 1;
 +
 +    setaddrmode_PVSDST(&(pAsm->D.dst), ADDR_ABSOLUTE);
 +    pAsm->D.dst.rtype = DST_REG_TEMPORARY;
 +    pAsm->D.dst.reg = tmp;
 +    nomask_PVSDST(&(pAsm->D.dst));
 +
 +    setaddrmode_PVSSRC(&(pAsm->S[0].src), ADDR_ABSOLUTE);
 +    pAsm->S[0].src.rtype = SRC_REG_TEMPORARY;
 +    pAsm->S[0].src.reg = tmp;
 +    setswizzle_PVSSRC(&(pAsm->S[0].src), SQ_SEL_X);
 +    noneg_PVSSRC(&(pAsm->S[0].src));
 +
 +    if( GL_FALSE == next_ins(pAsm) ) 
 +    {
 +        return GL_FALSE;
 +    }
 +
 +    // Now replicate result to all necessary channels in destination
 +    pAsm->D.dst.opcode = SQ_OP2_INST_MOV;
 +
 +    if( GL_FALSE == assemble_dst(pAsm) )
 +    {
 +        return GL_FALSE;
 +    }
 +
 +    setaddrmode_PVSSRC(&(pAsm->S[0].src), ADDR_ABSOLUTE);
 +    pAsm->S[0].src.rtype = DST_REG_TEMPORARY;
 +    pAsm->S[0].src.reg   = tmp;
 +
 +    setswizzle_PVSSRC(&(pAsm->S[0].src), SQ_SEL_X);
 +    noneg_PVSSRC(&(pAsm->S[0].src));
 +
 +    if( GL_FALSE == next_ins(pAsm) )
 +    {
 +        return GL_FALSE;
 +    }
 +
 +    return GL_TRUE;
 +}
 + 
 +GLboolean assemble_RCP(r700_AssemblerBase *pAsm) 
 +{
 +    return assemble_math_function(pAsm, SQ_OP2_INST_RECIP_IEEE);
 +}
 + 
 +GLboolean assemble_RSQ(r700_AssemblerBase *pAsm) 
 +{
 +    return assemble_math_function(pAsm, SQ_OP2_INST_RECIPSQRT_IEEE);
 +}
 + 
 +GLboolean assemble_SIN(r700_AssemblerBase *pAsm) 
 +{
 +    return assemble_math_function(pAsm, SQ_OP2_INST_SIN);
 +}
 + 
 +GLboolean assemble_SCS(r700_AssemblerBase *pAsm) 
 +{
 +    BITS tmp;
 +
 +	checkop1(pAsm);
 +
 +	tmp = gethelpr(pAsm);
 +
 +	// COS tmp.x,    a.x
 +	pAsm->D.dst.opcode = SQ_OP2_INST_COS;
 +	pAsm->D.dst.math = 1;
 +
 +	setaddrmode_PVSDST(&(pAsm->D.dst), ADDR_ABSOLUTE);
 +	pAsm->D.dst.rtype = DST_REG_TEMPORARY;
 +	pAsm->D.dst.reg = tmp;
 +	pAsm->D.dst.writex = 1;
 +
 +	if( GL_FALSE == assemble_src(pAsm, 0, -1) )
 +	{
 +		return GL_FALSE;
 +	}
 +
 +	if ( GL_FALSE == next_ins(pAsm) )
 +	{
 +		return GL_FALSE;
 +	}
 +
 +	// SIN tmp.y,    a.x
 +	pAsm->D.dst.opcode = SQ_OP2_INST_SIN;
 +	pAsm->D.dst.math = 1;
 +
 +	setaddrmode_PVSDST(&(pAsm->D.dst), ADDR_ABSOLUTE);
 +	pAsm->D.dst.rtype = DST_REG_TEMPORARY;
 +	pAsm->D.dst.reg = tmp;
 +	pAsm->D.dst.writey = 1;
 +
 +	if( GL_FALSE == assemble_src(pAsm, 0, -1) )
 +	{
 +		return GL_FALSE;
 +	}
 +
 +	if( GL_FALSE == next_ins(pAsm) )
 +	{
 +		return GL_FALSE;
 +	}
 +
 +	// MOV dst.mask,     tmp
 +	pAsm->D.dst.opcode = SQ_OP2_INST_MOV;
 +
 +	if( GL_FALSE == assemble_dst(pAsm) )
 +	{
 +		return GL_FALSE;
 +	}
 +
 +	setaddrmode_PVSSRC(&(pAsm->S[0].src), ADDR_ABSOLUTE);
 +	pAsm->S[0].src.rtype = DST_REG_TEMPORARY;
 +	pAsm->S[0].src.reg = tmp;
 +
 +	noswizzle_PVSSRC(&(pAsm->S[0].src));
 +	pAsm->S[0].src.swizzlez = SQ_SEL_0;
 +	pAsm->S[0].src.swizzlew = SQ_SEL_0;
 +
 +	if ( GL_FALSE == next_ins(pAsm) )
 +	{
 +		return GL_FALSE;
 +	}
 +
 +    return GL_TRUE;
 +}
 +
 +GLboolean assemble_LOGIC(r700_AssemblerBase *pAsm, BITS opcode) 
 +{
 +    if( GL_FALSE == checkop2(pAsm) )
 +    {
 +	    return GL_FALSE;
 +    }
 +
 +    pAsm->D.dst.opcode = opcode;
 +    pAsm->D.dst.math   = 1;
 +
 +    if( GL_FALSE == assemble_dst(pAsm) )
 +    {
 +	    return GL_FALSE;
 +    }
 +
 +    if( GL_FALSE == assemble_src(pAsm, 0, -1) )
 +    {
 +	    return GL_FALSE;
 +    }
 +
 +    if( GL_FALSE == assemble_src(pAsm, 1, -1) )
 +    {
 +	    return GL_FALSE;
 +    }
 +
 +    if( GL_FALSE == next_ins(pAsm) ) 
 +    {
 +	    return GL_FALSE;
 +    }
 +
 +    return GL_TRUE;
 +}
 +
 +GLboolean assemble_LOGIC_PRED(r700_AssemblerBase *pAsm, BITS opcode) 
 +{
 +    if( GL_FALSE == checkop2(pAsm) )
 +    {
 +	    return GL_FALSE;
 +    }
 +
 +    pAsm->D.dst.opcode = opcode;
 +    pAsm->D.dst.math   = 1;
 +    pAsm->D.dst.predicated = 1;
 +    pAsm->D2.dst2.SaturateMode = pAsm->pILInst[pAsm->uiCurInst].SaturateMode;
 +
 +    if( GL_FALSE == assemble_dst(pAsm) )
 +    {
 +	    return GL_FALSE;
 +    }
 +
 +    if( GL_FALSE == assemble_src(pAsm, 0, -1) )
 +    {
 +	    return GL_FALSE;
 +    }
 +
 +    if( GL_FALSE == assemble_src(pAsm, 1, -1) )
 +    {
 +	    return GL_FALSE;
 +    }
 +
 +    if( GL_FALSE == next_ins2(pAsm) ) 
 +    {
 +	    return GL_FALSE;
 +    }
 +
 +    return GL_TRUE;
 +}
 + 
 +GLboolean assemble_SGE(r700_AssemblerBase *pAsm) 
 +{
 +    if( GL_FALSE == checkop2(pAsm) )
 +    {
 +	    return GL_FALSE;
 +    }
 +
 +    pAsm->D.dst.opcode = SQ_OP2_INST_SETGE;  
 +
 +    if( GL_FALSE == assemble_dst(pAsm) )
 +    {
 +	    return GL_FALSE;
 +    }
 +
 +    if( GL_FALSE == assemble_src(pAsm, 0, -1) )
 +    {
 +	    return GL_FALSE;
 +    }
 +
 +    if( GL_FALSE == assemble_src(pAsm, 1, -1) )
 +    {
 +	    return GL_FALSE;
 +    }
 +
 +    if( GL_FALSE == next_ins(pAsm) ) 
 +    {
 +	    return GL_FALSE;
 +    }
 +
 +    return GL_TRUE;
 +}
 + 
 +GLboolean assemble_SLT(r700_AssemblerBase *pAsm) 
 +{
 +    if( GL_FALSE == checkop2(pAsm) )
 +    {
 +	    return GL_FALSE;
 +    }
 +
 +    pAsm->D.dst.opcode = SQ_OP2_INST_SETGT;  
 +
 +    if( GL_FALSE == assemble_dst(pAsm) )
 +    {
 +        return GL_FALSE;
 +    }
 +                
 +    if( GL_FALSE == assemble_src(pAsm, 0, 1) )  
 +    {
 +        return GL_FALSE;
 +    }
 +
 +    if( GL_FALSE == assemble_src(pAsm, 1, 0) )  
 +    {
 +        return GL_FALSE;
 +    }
 +
 +    if( GL_FALSE == next_ins(pAsm) )
 +    {
 +        return GL_FALSE;
 +    }
 +
 +    return GL_TRUE;
 +}
 + 
 +GLboolean assemble_STP(r700_AssemblerBase *pAsm) 
 +{
 +    return GL_TRUE;
 +}
 + 
 +GLboolean assemble_TEX(r700_AssemblerBase *pAsm) 
 +{
 +    GLboolean src_const;
 +    GLboolean need_barrier = GL_FALSE; 
 +
 +    checkop1(pAsm);
 +    
 +    switch (pAsm->pILInst[pAsm->uiCurInst].SrcReg[0].File)
 +    {
 +    case PROGRAM_UNIFORM: 
 +    case PROGRAM_CONSTANT:
 +    case PROGRAM_LOCAL_PARAM:
 +    case PROGRAM_ENV_PARAM:
 +    case PROGRAM_STATE_VAR:
 +        src_const = GL_TRUE;
 +        break;
 +    case PROGRAM_TEMPORARY:
 +    case PROGRAM_INPUT:
 +    default:
 +        src_const = GL_FALSE;
 +	break;
 +    }
 +
 +    if (GL_TRUE == src_const)
 +    {
 +	    if ( GL_FALSE == mov_temp(pAsm, 0) )
 +		    return GL_FALSE;
 +	    need_barrier = GL_TRUE;
 +    }
 +
-     switch (pAsm->pILInst[pAsm->uiCurInst].Opcode)
-     {
-         case OPCODE_TEX:
-             break;
-         case OPCODE_TXB:
-             radeon_error("do not support TXB yet\n");
-             return GL_FALSE;
-             break;
-         case OPCODE_TXP:
-             break;
-         default:
-             radeon_error("Internal error: bad texture op (not TEX)\n");
-             return GL_FALSE;
-             break;
-     }
- 
 +    if (pAsm->pILInst[pAsm->uiCurInst].Opcode == OPCODE_TXP)
 +    {
 +        GLuint tmp = gethelpr(pAsm);
 +        pAsm->D.dst.opcode = SQ_OP2_INST_RECIP_IEEE;
 +        pAsm->D.dst.math = 1;
 +        setaddrmode_PVSDST(&(pAsm->D.dst), ADDR_ABSOLUTE);
 +        pAsm->D.dst.rtype = DST_REG_TEMPORARY;
 +        pAsm->D.dst.reg   = tmp;
 +        pAsm->D.dst.writew = 1;
 +
 +        if( GL_FALSE == assemble_src(pAsm, 0, -1) )
 +        {
 +            return GL_FALSE;
 +        }
 +        swizzleagain_PVSSRC(&(pAsm->S[0].src), SQ_SEL_W, SQ_SEL_W, SQ_SEL_W, SQ_SEL_W);
 +        if( GL_FALSE == next_ins(pAsm) )
 +        {
 +            return GL_FALSE;
 +        }
 +
 +        pAsm->D.dst.opcode = SQ_OP2_INST_MUL;
 +        setaddrmode_PVSDST(&(pAsm->D.dst), ADDR_ABSOLUTE);
 +        pAsm->D.dst.rtype = DST_REG_TEMPORARY;
 +        pAsm->D.dst.reg   = tmp;
 +        pAsm->D.dst.writex = 1;
 +        pAsm->D.dst.writey = 1;
 +        pAsm->D.dst.writez = 1;
 +        pAsm->D.dst.writew = 0;
 +
 +        if( GL_FALSE == assemble_src(pAsm, 0, -1) )
 +        {
 +            return GL_FALSE;
 +        }
 +        setaddrmode_PVSSRC(&(pAsm->S[1].src), ADDR_ABSOLUTE);
 +        pAsm->S[1].src.rtype = SRC_REG_TEMPORARY;
 +        pAsm->S[1].src.reg   = tmp;
 +        setswizzle_PVSSRC(&(pAsm->S[1].src), SQ_SEL_W);
 +
 +        if( GL_FALSE == next_ins(pAsm) )
 +        {
 +            return GL_FALSE;
 +        }
 +        
 +        pAsm->aArgSubst[1] = tmp;
 +        need_barrier = GL_TRUE;
 +    }
 +
 +    if (pAsm->pILInst[pAsm->uiCurInst].TexSrcTarget == TEXTURE_CUBE_INDEX )
 +    {
 +        GLuint tmp1 = gethelpr(pAsm);
 +        GLuint tmp2 = gethelpr(pAsm);
 +        
 +        /* tmp1.xyzw = CUBE(R0.zzxy, R0.yxzz) */
 +        pAsm->D.dst.opcode = SQ_OP2_INST_CUBE;
 +        setaddrmode_PVSDST(&(pAsm->D.dst), ADDR_ABSOLUTE);
 +        pAsm->D.dst.rtype = DST_REG_TEMPORARY;
 +        pAsm->D.dst.reg   = tmp1;
 +        nomask_PVSDST(&(pAsm->D.dst));
 +	
 +        if( GL_FALSE == assemble_src(pAsm, 0, -1) )
 +        {
 +            return GL_FALSE;
 +        }
 +
 +        if( GL_FALSE == assemble_src(pAsm, 0, 1) )
 +        {
 +            return GL_FALSE;
 +        }
 +
 +        swizzleagain_PVSSRC(&(pAsm->S[0].src), SQ_SEL_Z, SQ_SEL_Z, SQ_SEL_X, SQ_SEL_Y);
 +        swizzleagain_PVSSRC(&(pAsm->S[1].src), SQ_SEL_Y, SQ_SEL_X, SQ_SEL_Z, SQ_SEL_Z); 
 +
 +        if( GL_FALSE == next_ins(pAsm) )
 +        {
 +            return GL_FALSE;
 +        }
 + 
 +        /* tmp1.z = ABS(tmp1.z) dont have abs support in assembler currently
 +         * have to do explicit instruction
 +         */
 +        pAsm->D.dst.opcode = SQ_OP2_INST_MAX;
 +        setaddrmode_PVSDST(&(pAsm->D.dst), ADDR_ABSOLUTE);
 +        pAsm->D.dst.rtype = DST_REG_TEMPORARY;
 +        pAsm->D.dst.reg   = tmp1;
 +        pAsm->D.dst.writez = 1;
 +
 +        setaddrmode_PVSSRC(&(pAsm->S[0].src), ADDR_ABSOLUTE);
 +        pAsm->S[0].src.rtype = SRC_REG_TEMPORARY;
 +        pAsm->S[0].src.reg = tmp1;
 +	noswizzle_PVSSRC(&(pAsm->S[0].src));
 +        pAsm->S[1].bits = pAsm->S[0].bits;
 +        flipneg_PVSSRC(&(pAsm->S[1].src));
 +        
 +        next_ins(pAsm);
 +
 +        /* tmp1.z = RCP_e(|tmp1.z|) */
 +        pAsm->D.dst.opcode = SQ_OP2_INST_RECIP_IEEE;
 +        pAsm->D.dst.math = 1;
 +        setaddrmode_PVSDST(&(pAsm->D.dst), ADDR_ABSOLUTE);
 +        pAsm->D.dst.rtype = DST_REG_TEMPORARY;
 +        pAsm->D.dst.reg   = tmp1;
 +        pAsm->D.dst.writez = 1;
 +
 +        setaddrmode_PVSSRC(&(pAsm->S[0].src), ADDR_ABSOLUTE);
 +        pAsm->S[0].src.rtype = SRC_REG_TEMPORARY;
 +        pAsm->S[0].src.reg = tmp1;
 +        pAsm->S[0].src.swizzlex = SQ_SEL_Z;
 +
 +        next_ins(pAsm);
 +
 +        /* MULADD R0.x,  R0.x,  PS1,  (0x3FC00000, 1.5f).x
 +         * MULADD R0.y,  R0.y,  PS1,  (0x3FC00000, 1.5f).x
 +         * muladd has no writemask, have to use another temp 
 +         * also no support for imm constants, so add 1 here
 +         */
 +        pAsm->D.dst.opcode = SQ_OP3_INST_MULADD;
 +        pAsm->D.dst.op3    = 1;
 +        setaddrmode_PVSDST(&(pAsm->D.dst), ADDR_ABSOLUTE);
 +        pAsm->D.dst.rtype = DST_REG_TEMPORARY;
 +        pAsm->D.dst.reg   = tmp2;
 +
 +        setaddrmode_PVSSRC(&(pAsm->S[0].src), ADDR_ABSOLUTE);
 +        pAsm->S[0].src.rtype = SRC_REG_TEMPORARY;
 +        pAsm->S[0].src.reg   = tmp1;
 +        noswizzle_PVSSRC(&(pAsm->S[0].src));
 +        setaddrmode_PVSSRC(&(pAsm->S[1].src), ADDR_ABSOLUTE);
 +        pAsm->S[1].src.rtype = SRC_REG_TEMPORARY;
 +        pAsm->S[1].src.reg   = tmp1;
 +        setswizzle_PVSSRC(&(pAsm->S[1].src), SQ_SEL_Z);
 +        setaddrmode_PVSSRC(&(pAsm->S[2].src), ADDR_ABSOLUTE);
 +        pAsm->S[2].src.rtype = SRC_REG_TEMPORARY;
 +        pAsm->S[2].src.reg   = tmp1;
 +        setswizzle_PVSSRC(&(pAsm->S[2].src), SQ_SEL_1);
 +
 +        next_ins(pAsm);
 +
 +        /* ADD the remaining .5 */
 +        pAsm->D.dst.opcode = SQ_OP2_INST_ADD;
 +        setaddrmode_PVSDST(&(pAsm->D.dst), ADDR_ABSOLUTE);
 +        pAsm->D.dst.rtype = DST_REG_TEMPORARY;
 +        pAsm->D.dst.reg   = tmp2;
 +        pAsm->D.dst.writex = 1;
 +        pAsm->D.dst.writey = 1;
 +        pAsm->D.dst.writez = 0;
 +        pAsm->D.dst.writew = 0;
 +
 +        setaddrmode_PVSSRC(&(pAsm->S[0].src), ADDR_ABSOLUTE);
 +        pAsm->S[0].src.rtype = SRC_REG_TEMPORARY;
 +        pAsm->S[0].src.reg   = tmp2;
 +        noswizzle_PVSSRC(&(pAsm->S[0].src));
 +        setaddrmode_PVSSRC(&(pAsm->S[1].src), ADDR_ABSOLUTE);
 +        pAsm->S[1].src.rtype = SRC_REG_TEMPORARY;
 +        pAsm->S[1].src.reg   = 252; // SQ_ALU_SRC_0_5 
 +        noswizzle_PVSSRC(&(pAsm->S[1].src));
 +
 +        next_ins(pAsm);
 +
 +        /* tmp1.xy = temp2.xy */
 +        pAsm->D.dst.opcode = SQ_OP2_INST_MOV;
 +        setaddrmode_PVSDST(&(pAsm->D.dst), ADDR_ABSOLUTE);
 +        pAsm->D.dst.rtype = DST_REG_TEMPORARY;
 +        pAsm->D.dst.reg   = tmp1;
 +        pAsm->D.dst.writex = 1;
 +        pAsm->D.dst.writey = 1;
 +        pAsm->D.dst.writez = 0;
 +        pAsm->D.dst.writew = 0;
 +
 +        setaddrmode_PVSSRC(&(pAsm->S[0].src), ADDR_ABSOLUTE);
 +        pAsm->S[0].src.rtype = SRC_REG_TEMPORARY;
 +        pAsm->S[0].src.reg   = tmp2;
 +        noswizzle_PVSSRC(&(pAsm->S[0].src));
 +
 +        next_ins(pAsm);
 +        pAsm->aArgSubst[1] = tmp1;
 +        need_barrier = GL_TRUE;
 +
 +    }
 +
-     pAsm->D.dst.opcode = SQ_TEX_INST_SAMPLE;
++    if(pAsm->pILInst[pAsm->uiCurInst].Opcode == OPCODE_TXB)
++    {
++        pAsm->D.dst.opcode = SQ_TEX_INST_SAMPLE_L;
++    }
++    else
++    {
++        pAsm->D.dst.opcode = SQ_TEX_INST_SAMPLE;
++    }
++
++    pAsm->is_tex = GL_TRUE;
++    if ( GL_TRUE == need_barrier )
++
 +    pAsm->is_tex = GL_TRUE;
 +    if ( GL_TRUE == need_barrier )
 +    {
 +        pAsm->need_tex_barrier = GL_TRUE;
 +    }
 +    // Set src1 to tex unit id
 +    pAsm->S[1].src.reg   = pAsm->pILInst[pAsm->uiCurInst].TexSrcUnit;
 +    pAsm->S[1].src.rtype = SRC_REG_TEMPORARY;
 +
 +    //No sw info from mesa compiler, so hard code here.
 +    pAsm->S[1].src.swizzlex = SQ_SEL_X;
 +    pAsm->S[1].src.swizzley = SQ_SEL_Y;
 +    pAsm->S[1].src.swizzlez = SQ_SEL_Z;
 +    pAsm->S[1].src.swizzlew = SQ_SEL_W;
 +
 +    if( GL_FALSE == tex_dst(pAsm) )
 +    {
 +        return GL_FALSE;
 +    }
 +
 +    if( GL_FALSE == tex_src(pAsm) )
 +    {
 +        return GL_FALSE;
 +    }
 +
 +    if(pAsm->pILInst[pAsm->uiCurInst].Opcode == OPCODE_TXP)
      {
 -        return GL_FALSE;
 +        /* hopefully did swizzles before */
 +        noswizzle_PVSSRC(&(pAsm->S[0].src));
 +    }
 +   
 +    if(pAsm->pILInst[pAsm->uiCurInst].TexSrcTarget == TEXTURE_CUBE_INDEX)
 +    {
 +        /* SAMPLE dst, tmp.yxwy, CUBE */
 +        pAsm->S[0].src.swizzlex = SQ_SEL_Y;
 +        pAsm->S[0].src.swizzley = SQ_SEL_X;
 +        pAsm->S[0].src.swizzlez = SQ_SEL_W;
 +        pAsm->S[0].src.swizzlew = SQ_SEL_Y;
      }
 + 
 +    if ( GL_FALSE == next_ins(pAsm) )
 +        {
 +            return GL_FALSE;
 +        }
  
      return GL_TRUE;
  }