From: Luke Kenneth Casson Leighton Date: Fri, 18 Feb 2022 21:22:45 +0000 (+0000) Subject: refer to gitlab nmigen X-Git-Tag: opf_rfc_ls005_v1~3193 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=b5f41973852d68c802299cac900275ef4bac4fcf;p=libreriscv.git refer to gitlab nmigen --- diff --git a/3d_gpu/architecture/dynamic_simd.mdwn b/3d_gpu/architecture/dynamic_simd.mdwn index 1ffdd3df7..5529e32dc 100644 --- a/3d_gpu/architecture/dynamic_simd.mdwn +++ b/3d_gpu/architecture/dynamic_simd.mdwn @@ -289,7 +289,7 @@ Analysis of the internals of nmigen shows that m.If, m.Else, m.FSM and m.Switch function only ast.Mux and other Type 1 (AST) "global" functions similar to python operator are used. The hypothesis is therefore proposed that if `Value.mux` is added in an identical way to how `operator.add` calls `__add__` this may turn out to be all that (or most of what) is needed. - + A deeper analysis shows that dsl.Module uses explicit Value.cast on its If, Elif, and Switch clauses. Overriding that and allowing a cast to diff --git a/HDL_workflow.mdwn b/HDL_workflow.mdwn index 45a0cb13c..32660164f 100644 --- a/HDL_workflow.mdwn +++ b/HDL_workflow.mdwn @@ -391,7 +391,7 @@ If "pip3 list" shows that nmigen has been auto-installed please remove it** * mkdir ~/src * cd !$ -* git clone https://github.com/nmigen/nmigen.git +* git clone https://gitlab.com/nmigen/nmigen.git * cd nmigen * sudo bash * python3 setup.py develop @@ -1095,6 +1095,6 @@ Find appropriate tutorials for nmigen and yosys, as well as symbiyosys. and walks not just through simulation, it takes you through using gtkwave as well. * There exist several nmigen examples which are also executable - exactly as + exactly as described in the above tutorial (python3 filename.py -h) * More nmigen tutorials at [[learning_nmigen]] diff --git a/docs/notes_on_formal_proofs.mdwn b/docs/notes_on_formal_proofs.mdwn index 1186868c8..ec3e9ae89 100644 --- a/docs/notes_on_formal_proofs.mdwn +++ b/docs/notes_on_formal_proofs.mdwn @@ -65,7 +65,7 @@ so I won't spend any more time on this. #### `CompALUOpSubset` `CompALUOpSubset` is, ultimately, an `nmigen` -[record](https://github.com/nmigen/nmigen/blob/master/nmigen/hdl/rec.py#L89) +[record](https://gitlab.com/nmigen/nmigen/blob/master/nmigen/hdl/rec.py#L89) which contains a number of fields related to telling the pipeline stage *what to do* and providing all the information it needs in order *to* "do". (Hence the *Op* in the class name.) I won't disclose