From: Dmitry Selyutin Date: Wed, 31 May 2023 19:46:21 +0000 (+0300) Subject: power_enums: introduce Reg as alias of SVExtraReg X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=b60e810ef376971921a2cb26a044d4376010c211;p=openpower-isa.git power_enums: introduce Reg as alias of SVExtraReg --- diff --git a/src/openpower/decoder/power_enums.py b/src/openpower/decoder/power_enums.py index 66298f98..0c2d6231 100644 --- a/src/openpower/decoder/power_enums.py +++ b/src/openpower/decoder/power_enums.py @@ -253,7 +253,7 @@ class SVExtra(Enum): SVEXTRA = SVExtra -class SVExtraReg(Enum): +class Reg(Enum): NONE = auto() RA = auto() RA_OR_ZERO = RA @@ -301,19 +301,19 @@ class SVExtraReg(Enum): @property def alias(self): alias = { - SVExtraReg.RSp: SVExtraReg.RS, - SVExtraReg.RTp: SVExtraReg.RT, - SVExtraReg.FRAp: SVExtraReg.FRA, - SVExtraReg.FRBp: SVExtraReg.FRB, - SVExtraReg.FRSp: SVExtraReg.FRS, - SVExtraReg.FRTp: SVExtraReg.FRT, + Reg.RSp: Reg.RS, + Reg.RTp: Reg.RT, + Reg.FRAp: Reg.FRA, + Reg.FRBp: Reg.FRB, + Reg.FRSp: Reg.FRS, + Reg.FRTp: Reg.FRT, }.get(self) if alias is not None: return alias alias = { - SVExtraReg.RA_OR_ZERO: SVExtraReg.RA, - SVExtraReg.RT_OR_ZERO: SVExtraReg.RT, + Reg.RA_OR_ZERO: Reg.RA, + Reg.RT_OR_ZERO: Reg.RT, }.get(self) if alias is not None: return alias @@ -321,6 +321,9 @@ class SVExtraReg(Enum): return self +SVExtraReg = Reg + + @unique class SVP64PredMode(Enum): ALWAYS = 0 @@ -642,7 +645,7 @@ class RegType(Enum): @classmethod def _missing_(cls, value): - if isinstance(value, SVExtraReg): + if isinstance(value, Reg): return cls.__members__.get(value.name) return super()._missing_(value)