From: Jacob Lifshay <programmerjake@gmail.com>
Date: Tue, 14 Mar 2023 00:01:10 +0000 (-0700)
Subject: add instruction section locations
X-Git-Tag: opf_rfc_ls001_v3~176
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=b6113d9093d93f14b6773a31c31c7ac952113f07;p=libreriscv.git

add instruction section locations
---

diff --git a/openpower/sv/rfc/ls007.mdwn b/openpower/sv/rfc/ls007.mdwn
index 1c1113318..757d868e9 100644
--- a/openpower/sv/rfc/ls007.mdwn
+++ b/openpower/sv/rfc/ls007.mdwn
@@ -152,6 +152,8 @@ Add `VA` to the `Formats:` list of `XO (27:31)`.
 
 # Ternary Logic Immediate TLI-form
 
+Add this section to Book I 3.3.13
+
 * `ternlogi RT, RA, RB, TLI` (`Rc=0`)
 * `ternlogi. RT, RA, RB, TLI` (`Rc=1`)
 
@@ -181,6 +183,8 @@ CR0                    (if Rc=1)
 
 # Dynamic Binary Logic VA-form
 
+Add this section to Book I 3.3.13
+
 * `binlog RT, RA, RB, RC, nh`
 
 | 0-5 | 6-10 | 11-15 | 16-20 | 21-25 | 26 | 27-31 | Form    |