From: Mike Frysinger Date: Sun, 31 Oct 2021 04:42:35 +0000 (-0400) Subject: sim: silence stamp touch rules X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=b6143d31625b3869a6715c7479cf665272162b6f;p=binutils-gdb.git sim: silence stamp touch rules We pretty much never care about these stamp touches, so silence them. Also switch to using $@ when it makes sense. --- diff --git a/sim/bpf/Makefile.in b/sim/bpf/Makefile.in index c33096b232e..e50e5c5de7a 100644 --- a/sim/bpf/Makefile.in +++ b/sim/bpf/Makefile.in @@ -89,7 +89,7 @@ stamp-arch: $(CGEN_COMMON_DEPS) $(CGEN_ARCH_SCM) mach=bpf cpu=bpfbf \ archfile=$(srcdir)/../../cpu/bpf.cpu \ FLAGS="with-scache" - touch $@ + $(SILENCE) touch $@ $(srcdir)/arch.h $(srcdir)/arch.c $(srcdir)/cpuall.h: $(CGEN_MAINT) stamp-arch @true @@ -99,7 +99,7 @@ stamp-cpu: $(CGEN_COMMON_DEPS) $(CGEN_CPU_SCM) archfile=$(srcdir)/../../cpu/bpf.cpu \ FLAGS="with-multiple-isa with-scache" rm -f $(srcdir)/model.c - touch $@ + $(SILENCE) touch $@ $(srcdir)/cpu.h $(srcdir)/cpu.c $(srcdir)/model.c: $(CGEN_MAINT) stamp-cpu @true @@ -121,7 +121,7 @@ stamp-defs-le: $(CGEN_COMMON_DEPS) $(CGEN_CPU_SCM) archfile=$(srcdir)/../../cpu/bpf.cpu \ FLAGS="with-scache" \ SUFFIX="-le" - touch $@ + $(SILENCE) touch $@ $(srcdir)/defs-le.h: $(CGEN_MAINT) stamp-defs-le @true @@ -132,7 +132,7 @@ stamp-defs-be: $(CGEN_COMMON_DEPS) $(CGEN_CPU_SCM) archfile=$(srcdir)/../../cpu/bpf.cpu \ FLAGS="with-scache" \ SUFFIX="-be" - touch $@ + $(SILENCE) touch $@ $(srcdir)/defs-be.h: $(CGEN_MAINT) stamp-defs-be @true @@ -143,7 +143,7 @@ stamp-decode-le: $(CGEN_COMMON_DEPS) $(CGEN_CPU_SCM) $(GEN_DECODE_SCM) FLAGS="with-scache" \ SUFFIX="-le" \ EXTRAFILES="$(CGEN_CPU_SEM)" - touch $@ + $(SILENCE) touch $@ $(srcdir)/sem-le.c $(srcdir)/decode-le.c $(srcdir)/decode-le.h: \ $(CGEN_MAINT) stamp-decode-le @true @@ -156,7 +156,7 @@ stamp-decode-be: $(CGEN_COMMON_DEPS) $(CGEN_CPU_SCM) $(GEN_DECODE_SCM) FLAGS="with-scache" \ SUFFIX="-be" \ EXTRAFILES="$(CGEN_CPU_SEM)" - touch $@ + $(SILENCE) touch $@ $(srcdir)/sem-be.c $(srcdir)/decode-be.c $(srcdir)/decode-be.h: \ $(CGEN_MAINT) stamp-decode-be @true @@ -171,7 +171,7 @@ stamp-mloop-le: $(srcdir)/../common/genmloop.sh mloop.in Makefile -infile $(srcdir)/mloop.in -outfile-suffix -le $(SILENCE) $(SHELL) $(srcroot)/move-if-change eng-le.hin eng-le.h $(SILENCE) $(SHELL) $(srcroot)/move-if-change mloop-le.cin mloop-le.c - touch $@ + $(SILENCE) touch $@ mloop-le.c eng-le.h: stamp-mloop-le @true @@ -181,7 +181,7 @@ stamp-mloop-be: $(srcdir)/../common/genmloop.sh mloop.in Makefile -infile $(srcdir)/mloop.in -outfile-suffix -be $(SILENCE) $(SHELL) $(srcroot)/move-if-change eng-be.hin eng-be.h $(SILENCE) $(SHELL) $(srcroot)/move-if-change mloop-be.cin mloop-be.c - touch $@ + $(SILENCE) touch $@ mloop-be.c eng-be.h: stamp-mloop-be @true diff --git a/sim/common/Make-common.in b/sim/common/Make-common.in index a9bddb6e680..ced77f4b2cc 100644 --- a/sim/common/Make-common.in +++ b/sim/common/Make-common.in @@ -266,7 +266,7 @@ stamp-tvals: gentmap $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-tvals.h targ-vals.h ./gentmap -c >tmp-tmap.c $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-tmap.c targ-map.c - touch stamp-tvals + $(SILENCE) touch $@ # # Rules for building sim-* components. Triggered by listing the corresponding @@ -425,7 +425,7 @@ stamp-hw: Makefile.in $(srccom)/Make-common.in $(config.status) Makefile echo " NULL," >> tmp-hw.h echo "};" >> tmp-hw.h $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-hw.h hw-config.h - @echo stamp > stamp-hw + $(SILENCE) touch $@ test-hw-events: $(srccom)/hw-events.c libsim.a $(CC) $(ALL_CFLAGS) -DMAIN -o test-hw-events$(EXEEXT) \ @@ -451,7 +451,7 @@ stamp-modules: Makefile $(SIM_OBJS:.o=.c) ) >$@.tmp $(SILENCE) $(SHELL) $(srcroot)/move-if-change $@.tmp modules.c @rm -f $@.l-tmp $@.tmp - touch $@ + $(SILENCE) touch $@ # CGEN support. diff --git a/sim/cris/Makefile.in b/sim/cris/Makefile.in index c6e134b5616..d47fe71865d 100644 --- a/sim/cris/Makefile.in +++ b/sim/cris/Makefile.in @@ -75,7 +75,7 @@ stamp-v10fmloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile -cpu crisv10f -infile $(srcdir)/mloop.in $(SILENCE) $(SHELL) $(srcroot)/move-if-change eng.hin engv10.h $(SILENCE) $(SHELL) $(srcroot)/move-if-change mloop.cin mloopv10f.c - touch stamp-v10fmloop + $(SILENCE) touch $@ # CRISV32 objs @@ -94,7 +94,7 @@ stamp-v32fmloop: stamp-v10fmloop $(srcdir)/../common/genmloop.sh mloop.in Makefi -cpu crisv32f -infile $(srcdir)/mloop.in $(SILENCE) $(SHELL) $(srcroot)/move-if-change eng.hin engv32.h $(SILENCE) $(SHELL) $(srcroot)/move-if-change mloop.cin mloopv32f.c - touch stamp-v32fmloop + $(SILENCE) touch $@ cris-clean: for v in 10 32; do \ @@ -111,7 +111,7 @@ stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(CPU_DIR)/cris.cpu Makefile $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=crisv10,crisv32 \ archfile=$(CPU_DIR)/cris.cpu \ FLAGS="with-scache with-profile=fn" - touch stamp-arch + $(SILENCE) touch $@ arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch # The sed-hack is supposed to be temporary, until we get CGEN to emit it. @@ -120,7 +120,7 @@ stamp-v10fcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/cr archfile=$(CPU_DIR)/cris.cpu \ cpu=crisv10f mach=crisv10 SUFFIX=v10 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)" $(SILENCE) $(SHELL) $(srcroot)/move-if-change $(srcdir)/semv10-switch.c $(srcdir)/semcrisv10f-switch.c - touch stamp-v10fcpu + $(SILENCE) touch $@ cpuv10.h cpuv10.c semcrisv10f-switch.c modelv10.c decodev10.c decodev10.h: $(CGEN_MAINT) stamp-v10fcpu stamp-v32fcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/cris.cpu Makefile @@ -128,5 +128,5 @@ stamp-v32fcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/cr archfile=$(CPU_DIR)/cris.cpu \ cpu=crisv32f mach=crisv32 SUFFIX=v32 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)" $(SILENCE) $(SHELL) $(srcroot)/move-if-change $(srcdir)/semv32-switch.c $(srcdir)/semcrisv32f-switch.c - touch stamp-v32fcpu + $(SILENCE) touch $@ cpuv32.h cpuv32.c semcrisv32f-switch.c modelv32.c decodev32.c decodev32.h: $(CGEN_MAINT) stamp-v32fcpu diff --git a/sim/frv/Makefile.in b/sim/frv/Makefile.in index fd8df139940..640da02ab6a 100644 --- a/sim/frv/Makefile.in +++ b/sim/frv/Makefile.in @@ -62,7 +62,7 @@ stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile -cpu frvbf -infile $(srcdir)/mloop.in $(SILENCE) $(SHELL) $(srcroot)/move-if-change eng.hin eng.h $(SILENCE) $(SHELL) $(srcroot)/move-if-change mloop.cin mloop.c - touch stamp-mloop + $(SILENCE) touch $@ frv-clean: rm -f mloop.c eng.h stamp-mloop @@ -73,7 +73,7 @@ stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(srcdir)/../../cpu/frv.cpu $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=all \ archfile=$(srcdir)/../../cpu/frv.cpu \ FLAGS="with-scache" - touch stamp-arch + $(SILENCE) touch $@ arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch # @true @@ -83,6 +83,6 @@ stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(srcdir)/../../c archfile=$(srcdir)/../../cpu/frv.cpu \ FLAGS="with-scache with-profile=fn with-generic-write with-parallel-only" \ EXTRAFILES="$(CGEN_CPU_SEM)" - touch stamp-cpu + $(SILENCE) touch $@ cpu.h sem.c model.c decode.c decode.h: $(CGEN_MAINT) stamp-cpu # @true diff --git a/sim/iq2000/Makefile.in b/sim/iq2000/Makefile.in index af0b918b118..bbc659049ae 100644 --- a/sim/iq2000/Makefile.in +++ b/sim/iq2000/Makefile.in @@ -62,7 +62,7 @@ stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile -cpu iq2000bf -infile $(srcdir)/mloop.in $(SILENCE) $(SHELL) $(srcroot)/move-if-change eng.hin eng.h $(SILENCE) $(SHELL) $(srcroot)/move-if-change mloop.cin mloop.c - touch stamp-mloop + $(SILENCE) touch $@ iq2000-clean: rm -f mloop.c eng.h stamp-mloop @@ -73,7 +73,7 @@ stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(CPU_DIR)/iq2000.cpu Makefile $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=iq2000 \ archfile=$(CPU_DIR)/iq2000.cpu \ FLAGS="with-scache with-profile=fn" - touch stamp-arch + $(SILENCE) touch $@ arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch @true @@ -83,6 +83,6 @@ stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/iq2000 archfile=$(CPU_DIR)/iq2000.cpu \ FLAGS="with-scache with-profile=fn" \ EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)" - touch stamp-cpu + $(SILENCE) touch $@ cpu.h sem.c sem-switch.c model.c decode.c decode.h: $(CGEN_MAINT) stamp-cpu @true diff --git a/sim/lm32/Makefile.in b/sim/lm32/Makefile.in index 465c7fe7870..587039cc161 100644 --- a/sim/lm32/Makefile.in +++ b/sim/lm32/Makefile.in @@ -43,7 +43,7 @@ stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile -cpu lm32bf -infile $(srcdir)/mloop.in $(SILENCE) $(SHELL) $(srcroot)/move-if-change eng.hin eng.h $(SILENCE) $(SHELL) $(srcroot)/move-if-change mloop.cin mloop.c - touch stamp-mloop + $(SILENCE) touch $@ lm32-clean: rm -f mloop.c eng.h stamp-mloop @@ -54,7 +54,7 @@ stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(CPU_DIR)/lm32.cpu $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=all \ archfile=$(CPU_DIR)/lm32.cpu \ FLAGS="with-scache with-profile=fn" - touch stamp-arch + $(SILENCE) touch $@ arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/lm32.cpu @@ -63,5 +63,5 @@ stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/lm32.c archfile=$(CPU_DIR)/lm32.cpu \ FLAGS="with-scache with-profile=fn" \ EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)" - touch stamp-cpu + $(SILENCE) touch $@ cpu.h sem.c sem-switch.c model.c decode.c decode.h: $(CGEN_MAINT) stamp-cpu diff --git a/sim/m32r/Makefile.in b/sim/m32r/Makefile.in index 340c94636e0..9add7f88c56 100644 --- a/sim/m32r/Makefile.in +++ b/sim/m32r/Makefile.in @@ -64,7 +64,7 @@ stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile -cpu m32rbf -infile $(srcdir)/mloop.in $(SILENCE) $(SHELL) $(srcroot)/move-if-change eng.hin eng.h $(SILENCE) $(SHELL) $(srcroot)/move-if-change mloop.cin mloop.c - touch stamp-mloop + $(SILENCE) touch $@ # M32RX objs @@ -81,7 +81,7 @@ stamp-xmloop: $(srcdir)/../common/genmloop.sh mloopx.in Makefile -outfile-suffix x $(SILENCE) $(SHELL) $(srcroot)/move-if-change engx.hin engx.h $(SILENCE) $(SHELL) $(srcroot)/move-if-change mloopx.cin mloopx.c - touch stamp-xmloop + $(SILENCE) touch $@ # M32R2 objs @@ -98,7 +98,7 @@ stamp-2mloop: $(srcdir)/../common/genmloop.sh mloop2.in Makefile -outfile-suffix 2 $(SILENCE) $(SHELL) $(srcroot)/move-if-change eng2.hin eng2.h $(SILENCE) $(SHELL) $(srcroot)/move-if-change mloop2.cin mloop2.c - touch stamp-2mloop + $(SILENCE) touch $@ m32r-clean: rm -f mloop.c eng.h stamp-mloop @@ -115,7 +115,7 @@ stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(CPU_DIR)/m32r.cpu Makefile $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=all \ archfile=$(CPU_DIR)/m32r.cpu \ FLAGS="with-scache with-profile=fn" - touch stamp-arch + $(SILENCE) touch $@ $(srcdir)/arch.h $(srcdir)/arch.c $(srcdir)/cpuall.h: $(CGEN_MAINT) stamp-arch @true @@ -125,7 +125,7 @@ stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/m32r.c archfile=$(CPU_DIR)/m32r.cpu \ FLAGS="with-scache with-profile=fn" \ EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)" - touch stamp-cpu + $(SILENCE) touch $@ $(srcdir)/cpu.h $(srcdir)/sem.c $(srcdir)/sem-switch.c $(srcdir)/model.c $(srcdir)/decode.c $(srcdir)/decode.h: $(CGEN_MAINT) stamp-cpu @true @@ -135,7 +135,7 @@ stamp-xcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/m32r. archfile=$(CPU_DIR)/m32r.cpu \ FLAGS="with-scache with-profile=fn" \ EXTRAFILES="$(CGEN_CPU_SEMSW)" - touch stamp-xcpu + $(SILENCE) touch $@ $(srcdir)/cpux.h $(srcdir)/semx-switch.c $(srcdir)/modelx.c $(srcdir)/decodex.c $(srcdir)/decodex.h: $(CGEN_MAINT) stamp-xcpu @true @@ -145,6 +145,6 @@ stamp-2cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/m32r. archfile=$(CPU_DIR)/m32r.cpu \ FLAGS="with-scache with-profile=fn" \ EXTRAFILES="$(CGEN_CPU_SEMSW)" - touch stamp-2cpu + $(SILENCE) touch $@ $(srcdir)/cpu2.h $(srcdir)/sem2-switch.c $(srcdir)/model2.c $(srcdir)/decode2.c $(srcdir)/decode2.h: $(CGEN_MAINT) stamp-2cpu @true diff --git a/sim/mips/Makefile.in b/sim/mips/Makefile.in index 0846f5b44d6..3c56c34e0bf 100644 --- a/sim/mips/Makefile.in +++ b/sim/mips/Makefile.in @@ -179,7 +179,7 @@ tmp-igen: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(IGEN_INCLUDE) $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-engine.h engine.h $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-engine.c engine.c $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-irun.c irun.c - touch tmp-igen + $(SILENCE) touch $@ BUILT_SRC_FROM_M16 = \ m16_icache.h \ @@ -292,7 +292,7 @@ tmp-m16: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(IGEN_INCLUDE) # $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-itable.h itable.h $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-itable.c itable.c - touch tmp-m16 + $(SILENCE) touch $@ BUILT_SRC_FROM_MICROMIPS = \ micromips16_icache.h \ @@ -451,7 +451,7 @@ tmp-micromips: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(IGEN_INCLUDE) # $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-itable.h itable.h $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-itable.c itable.c - touch tmp-micromips + $(SILENCE) touch $@ BUILT_SRC_FROM_MULTI = @sim_multi_src@ SIM_MULTI_IGEN_CONFIGS = @sim_multi_igen_configs@ @@ -527,7 +527,7 @@ tmp-mach-multi: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(IGEN_INCLUDE) $(SHELL) $(srcdir)/../../move-if-change tmp-engine.c \ $${p}_engine.c ; \ done - touch tmp-mach-multi + $(SILENCE) touch $@ tmp-itable-multi: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(IGEN_INCLUDE) $(IGEN_RUN) \ $(IGEN_TRACE) \ @@ -545,7 +545,7 @@ tmp-itable-multi: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(IGEN_INCLUDE) # $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-itable.h itable.h $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-itable.c itable.c - touch tmp-itable-multi + $(SILENCE) touch $@ tmp-run-multi: $(srcdir)/m16run.c $(srcdir)/micromipsrun.c for t in $(SIM_MULTI_IGEN_CONFIGS); do \ case $${t} in \ @@ -580,7 +580,7 @@ tmp-run-multi: $(srcdir)/m16run.c $(srcdir)/micromipsrun.c ;;\ esac \ done - touch tmp-run-multi + $(SILENCE) touch $@ clean-extra: rm -f $(BUILT_SRC_FROM_GEN) diff --git a/sim/mn10300/Makefile.in b/sim/mn10300/Makefile.in index 5e75601a8ec..7475234350f 100644 --- a/sim/mn10300/Makefile.in +++ b/sim/mn10300/Makefile.in @@ -104,4 +104,4 @@ tmp-igen: $(IGEN_INSN) $(IGEN_INSN_INC) $(IGEN_DC) $(IGEN) $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-engine.h engine.h $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-engine.c engine.c $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-irun.c irun.c - touch tmp-igen + $(SILENCE) touch $@ diff --git a/sim/or1k/Makefile.in b/sim/or1k/Makefile.in index 6d399de53fc..e6fb632cf91 100644 --- a/sim/or1k/Makefile.in +++ b/sim/or1k/Makefile.in @@ -77,7 +77,7 @@ stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile -cpu or1k32bf -infile $(srcdir)/mloop.in $(SILENCE) $(SHELL) $(srcroot)/move-if-change eng.hin eng.h $(SILENCE) $(SHELL) $(srcroot)/move-if-change mloop.cin mloop.c - touch stamp-mloop + $(SILENCE) touch $@ or1k.o: or1k.c $(OR1K32BF_INCLUDE_DEPS) $(COMPILE) $< $(POSTCOMPILE) @@ -112,7 +112,7 @@ stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(OR1K_CGEN_DEPS) mach=or32,or32nd \ archfile=$(CPU_DIR)/or1k.cpu \ FLAGS="with-scache" - touch $@ + $(SILENCE) touch $@ $(srcdir)/arch.h $(srcdir)/arch.c $(srcdir)/cpuall.h: $(CGEN_MAINT) stamp-arch @true @@ -123,6 +123,6 @@ stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(OR1K_CGEN_DEPS) archfile=$(CPU_DIR)/or1k.cpu \ FLAGS="with-scache" \ EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)" - touch $@ + $(SILENCE) touch $@ $(srcdir)/cpu.h $(srcdir)/cpu.c $(srcdir)/model.c $(srcdir)/sem.c $(srcdir)/sem-switch.c $(srcdir)/decode.c $(srcdir)/decode.h: $(CGEN_MAINT) stamp-cpu @true diff --git a/sim/ppc/Makefile.in b/sim/ppc/Makefile.in index 4cc0916fbad..29f4010d3d1 100644 --- a/sim/ppc/Makefile.in +++ b/sim/ppc/Makefile.in @@ -636,7 +636,7 @@ defines.h: tmp-defines; @true tmp-defines: config.h Makefile sed -n -e '/^#define HAVE_/s/ 1$$/",/' -e '/^#define HAVE_/s//"HAVE_/p' < config.h > tmp-defines.h $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-defines.h defines.h - touch tmp-defines + $(SILENCE) touch $@ # # Rules to create the built c source code files @@ -649,7 +649,7 @@ tmp-dgen: dgen ppc-spr-table $(srcroot)/move-if-change -n spreg.c -p tmp-spreg.c $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-spreg.h spreg.h $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-spreg.c spreg.c - touch tmp-dgen + $(SILENCE) touch $@ tmp-igen: igen $(srcdir)/ppc-instructions $(srcdir)/altivec.igen $(srcdir)/e500.igen $(IGEN_OPCODE_RULES) $(srcroot)/move-if-change tmp-ld-decode tmp-ld-cache tmp-ld-insn tmp-filter $(IGEN) $(IGEN_FLAGS) \ @@ -679,7 +679,7 @@ tmp-igen: igen $(srcdir)/ppc-instructions $(srcdir)/altivec.igen $(srcdir)/e500. $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-model.c model.c $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-support.h support.h $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-support.c support.c - touch tmp-igen + $(SILENCE) touch $@ # NOTE: Some versions of make don't handle files created as side-effects # uncomment the below if that is the case. @@ -785,7 +785,7 @@ tmp-hw: Makefile $(HW_SRC) $(srcroot)/move-if-change > tmp-hw.c $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-hw.h hw.h $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-hw.c hw.c - touch tmp-hw + $(SILENCE) touch $@ hw_cpu.o: hw_cpu.c $(DEVICE_TABLE_H) $(HW_CPU_H) $(INTERRUPTS_H) $(CPU_H) hw_com.o: hw_com.c $(DEVICE_TABLE_H) @@ -828,7 +828,7 @@ tmp-pk: Makefile $(PACKAGE_SRC) $(srcroot)/move-if-change -e 's/$$/_create_instance;/' \ > tmp-pk.h $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-pk.h pk.h - touch tmp-pk + $(SILENCE) touch $@ pk_disklabel.o: pk_disklabel.c $(DEVICE_TABLE_H) $(PK_H) # ignore this line, it stops make from getting confused diff --git a/sim/v850/Makefile.in b/sim/v850/Makefile.in index b514430ef8b..37b65b3ebf6 100644 --- a/sim/v850/Makefile.in +++ b/sim/v850/Makefile.in @@ -102,7 +102,7 @@ tmp-igen: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-engine.h engine.h $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-engine.c engine.c $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-irun.c irun.c - touch tmp-igen + $(SILENCE) touch $@ clean-extra: clean-igen rm -f table.c simops.h gencode