From: Gabe Black <gblack@eecs.umich.edu>
Date: Sun, 29 Jul 2007 08:28:36 +0000 (-0700)
Subject: X86: Fix register ordering.
X-Git-Tag: m5_2.0_beta4~257
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=b6395da4cea2d12f27ae52517675dfdf507d4a92;p=gem5.git

X86: Fix register ordering.
The correct order is unintuitively rax, rcx, rdx, rbx, etc, not rax, rbx, rcx, rdx.

--HG--
extra : convert_revision : 3abe6a723a6e30becfe34f8da707ea2ff5d4df77
---

diff --git a/src/cpu/nativetrace.cc b/src/cpu/nativetrace.cc
index 57304c79b..90a0e1a62 100644
--- a/src/cpu/nativetrace.cc
+++ b/src/cpu/nativetrace.cc
@@ -107,9 +107,9 @@ Trace::NativeTraceRecord::dump()
     if(!staticInst->isMicroop() || staticInst->isLastMicroop())
     {
         checkIntReg("rax", INTREG_RAX, sizeof(uint64_t));
-        checkIntReg("rbx", INTREG_RBX, sizeof(uint64_t));
         checkIntReg("rcx", INTREG_RCX, sizeof(uint64_t));
         checkIntReg("rdx", INTREG_RDX, sizeof(uint64_t));
+        checkIntReg("rbx", INTREG_RBX, sizeof(uint64_t));
         checkIntReg("rsp", INTREG_RSP, sizeof(uint64_t));
         checkIntReg("rbp", INTREG_RBP, sizeof(uint64_t));
         checkIntReg("rsi", INTREG_RSI, sizeof(uint64_t));