From: Nick Clifton Date: Wed, 4 Mar 2015 14:54:15 +0000 (+0000) Subject: rl78.h (enum reg_class): Remove real registers from General register class. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=b68686bf5e70ab75815992faaa48218cffd9d830;p=gcc.git rl78.h (enum reg_class): Remove real registers from General register class. * config/rl78/rl78.h (enum reg_class): Remove real registers from General register class. * config/rl78/rl78-real.md: Replace general register constraints with real+virtual register constraints. From-SVN: r221185 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 58f421f6398..27c712b1453 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2015-03-04 Nick Clifton + + * config/rl78/rl78.h (enum reg_class): Remove real registers from + General register class. + * config/rl78/rl78-real.md: Replace general register constraints + with real+virtual register constraints. + 2015-03-04 Andreas Krebbel * gcc/config/s390/s390.c (s390_expand_builtin): Exlude non-htm diff --git a/gcc/config/rl78/rl78-real.md b/gcc/config/rl78/rl78-real.md index cfd9742a5d7..f6ab7ff4213 100644 --- a/gcc/config/rl78/rl78-real.md +++ b/gcc/config/rl78/rl78-real.md @@ -59,7 +59,7 @@ ) (define_insn "*movqi_real" - [(set (match_operand:QI 0 "rl78_nonimmediate_operand" "=g,RaxbcWab,RaxbcWab,a, bcx,R, WabWd2WhlWh1WhbWbcWs1v, bcx,WsaWsf") + [(set (match_operand:QI 0 "rl78_nonimmediate_operand" "=Rv,RaxbcWab,RaxbcWab,a, bcx,R, WabWd2WhlWh1WhbWbcWs1v, bcx,WsaWsf") (match_operand 1 "rl78_general_operand" "0,K, M, RInt8sJvWabWdeWd2WhlWh1WhbWbcWs1,Wab,aInt8J,a, R, i"))] "rl78_real_insns_ok ()" "@ @@ -75,7 +75,7 @@ ) (define_insn "*movhi_real" - [(set (match_operand:HI 0 "rl78_nonimmediate_operand" "=g,AB,AB,RSv,A,BDTvSWabWd2WdeWhlWh1WbcWs1, BDT,ABDT,v") + [(set (match_operand:HI 0 "rl78_nonimmediate_operand" "=Rv,AB,AB,RSv,A,BDTvSWabWd2WdeWhlWh1WbcWs1, BDT,ABDT,v") (match_operand:HI 1 "rl78_general_operand" " 0,K, M, i, BDTvSWabWd2WdeWh1WhlWbcWs1,A, BDT,vS, ABDT"))] "rl78_real_insns_ok ()" "@ @@ -93,7 +93,7 @@ ;;---------- Conversions ------------------------ (define_insn "*zero_extendqihi2_real" - [(set (match_operand:HI 0 "nonimmediate_operand" "=rv,A") + [(set (match_operand:HI 0 "nonimmediate_operand" "=Rv,A") (zero_extend:HI (match_operand:QI 1 "general_operand" "0,a")))] "rl78_real_insns_ok ()" "@ @@ -113,7 +113,7 @@ ;;---------- Arithmetic ------------------------ (define_insn "*addqi3_real" - [(set (match_operand:QI 0 "rl78_nonimmediate_operand" "=rvWabWhlWh1Wsa,rvWabWhlWh1Wsa,a,*bcdehl,Wsa") + [(set (match_operand:QI 0 "rl78_nonimmediate_operand" "=RvWabWhlWh1Wsa,RvWabWhlWh1Wsa,a,*bcdehl,Wsa") (plus:QI (match_operand:QI 1 "rl78_general_operand" "%0,0,0,0,0") (match_operand:QI 2 "rl78_general_operand" "K,L,RWhlWh1Wabi,a,i"))) ] @@ -146,8 +146,8 @@ ) (define_insn "*addqihi3a_real" - [(set (match_operand:HI 0 "register_operand" "=r") - (plus:HI (zero_extend:HI (match_operand:QI 1 "register_operand" "r")) + [(set (match_operand:HI 0 "register_operand" "=R") + (plus:HI (zero_extend:HI (match_operand:QI 1 "register_operand" "R")) (match_operand:HI 2 "register_operand" "0"))) ] "rl78_real_insns_ok ()" @@ -381,7 +381,7 @@ [(set (pc) (if_then_else (match_operator 0 "rl78_cmp_operator_real" [(match_operand:QI 1 "rl78_general_operand" "Wabvaxbc,a, vWsaWab,bcdehl") - (match_operand:QI 2 "rl78_general_operand" "M, irvWabWhlWh1Whb,i,a")]) + (match_operand:QI 2 "rl78_general_operand" "M, iRvWabWhlWh1Whb,i,a")]) (label_ref (match_operand 3 "" "")) (pc)))] "rl78_real_insns_ok ()" diff --git a/gcc/config/rl78/rl78.h b/gcc/config/rl78/rl78.h index d7ec21c0c85..caa7f7f6541 100644 --- a/gcc/config/rl78/rl78.h +++ b/gcc/config/rl78/rl78.h @@ -266,7 +266,7 @@ enum reg_class { 0x00000c00, 0x00000000 }, /* R10 - HImode */ \ { 0xff000000, 0x00000000 }, /* INT - HImode */ \ { 0xff7fff00, 0x00000000 }, /* Virtual registers. */ \ - { 0xff7fffff, 0x00000002 }, /* General registers. */ \ + { 0xff7fff00, 0x00000002 }, /* General registers. */ \ { 0x04000000, 0x00000004 }, /* PSW. */ \ { 0xff7fffff, 0x0000001f } /* All registers. */ \ }