From: Giacomo Travaglini <giacomo.travaglini@arm.com>
Date: Sun, 13 Sep 2020 11:53:05 +0000 (+0100)
Subject: sim: Replace any getDTBPtr/getITBPtr usage
X-Git-Tag: develop-gem5-snapshot~553
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=b6a08919e932614b5cb64150c432f8153375ee44;p=gem5.git

sim: Replace any getDTBPtr/getITBPtr usage

JIRA: https://gem5.atlassian.net/browse/GEM5-790

Change-Id: Ibd78bef263d186889f4533583ff30f46a0a8643f
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/34981
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
---

diff --git a/src/sim/mem_state.cc b/src/sim/mem_state.cc
index bcfab7859..7adee590a 100644
--- a/src/sim/mem_state.cc
+++ b/src/sim/mem_state.cc
@@ -30,7 +30,7 @@
 
 #include <cassert>
 
-#include "arch/generic/tlb.hh"
+#include "arch/generic/mmu.hh"
 #include "debug/Vma.hh"
 #include "mem/se_translating_port_proxy.hh"
 #include "sim/process.hh"
@@ -258,8 +258,7 @@ MemState::unmapRegion(Addr start_addr, Addr length)
      * that can flush just part of the address space.
      */
     for (auto *tc: _ownerProcess->system->threads) {
-        tc->getDTBPtr()->flushAll();
-        tc->getITBPtr()->flushAll();
+        tc->getMMUPtr()->flushAll();
     }
 
     do {
@@ -360,8 +359,7 @@ MemState::remapRegion(Addr start_addr, Addr new_start_addr, Addr length)
      * that can flush just part of the address space.
      */
     for (auto *tc: _ownerProcess->system->threads) {
-        tc->getDTBPtr()->flushAll();
-        tc->getITBPtr()->flushAll();
+        tc->getMMUPtr()->flushAll();
     }
 
     do {